Analog-to-digital converter non-linearity correction using coefficient transformation

Patent metadata

Field	Value
Publication number	US-9935645-B1
Application number	US-201715674175-A
Country	US
Kind code	B1
Filing date	Aug 10, 2017
Priority date	Oct 5, 2016
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

Circuitry for correcting non-linearity of an analog-to-digital converter. A non-linearity correction system for an analog-to-digital converter (ADC) includes coefficient storage, coefficient transformation circuitry, and correction circuitry. The coefficient storage is encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate. The coefficient transformation circuitry is coupled to the coefficient storage. The coefficient transformation circuitry is configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate. The correction circuitry is configured to apply the second set of coefficients to correct non-linearity in output of the ADC while the ADC is operating at the different sampling rate.

First claim

What is claimed is:

1. A non-linearity correction system for an analog-to-digital converter (ADC), the system comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate; and
correction circuitry configured to apply the second set of coefficients to correct non-linearity in an output of the ADC while the ADC is operating at the different sampling rate;

wherein:
the first set of coefficients is for correcting the non-linearity of the ADC for a predetermined band of signal; and
the coefficient transformation circuitry is configured to generate the second set of coefficients for a different band of the signal.

2. The system of claim 1 , wherein the different band is narrower than and within the predetermined band, and the coefficient transformation circuitry is configured to generate the second set of coefficients for fewer than a number of terms corresponding to the first set of coefficients based on the second band being narrower than and within the predetermined band.

3. A non-linearity correction system for an analog-to-digital converter (ADC), the system comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate; and
correction circuitry configured to apply the second set of coefficients to correct non-linearity in an output of the ADC while the ADC is operating at the different sampling rate;
wherein the coefficient transformation circuitry is configured to multiply the first set of coefficients by a transformation matrix to generate the second set of coefficients.

4. A non-linearity correction system for an analog-to-digital converter (ADC), the system comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate; and
correction circuitry configured to apply the second set of coefficients to correct non-linearity in an output of the ADC while the ADC is operating at the different sampling rate;
wherein the first set of coefficients is selected for a virtual sampling rate that is at least twice the maximum frequency convertible by the ADC.

5. A non-linearity correction system for an analog-to-digital converter (ADC), the system comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate; and
correction circuitry configured to apply the second set of coefficients to correct non-linearity in an output of the ADC while the ADC is operating at the different sampling rate;
wherein the first set of coefficients is selected for use across each of a plurality of Nyquist bands supported by the ADC.

6. The system of claim 5 , wherein the coefficient transformation circuitry is configured to generate the second set of coefficients for fewer than a number of terms corresponding to the first set of coefficients.

7. A non-linearity correction system for an analog-to-digital converter (ADC), the system comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to generate a second set of coefficients for correcting non-linearity of the ADC at a different sampling rate; and
correction circuitry configured to apply the second set of coefficients to correct non-linearity in an output of the ADC while the ADC is operating at the different sampling rate;
further comprising control circuitry coupled to the coefficient transformation circuitry, the control circuitry configured to communicate to the coefficient transformation circuitry one or more parameters selected from the different sampling rate, a number of terms corresponding to the second set of coefficients, or a band of signal to be processed using the second set of coefficients.

8. The system of claim 7 , wherein the coefficient transformation circuitry is configured to:
generate a transformation matrix based on the one or more parameters; and
multiply the first set of coefficients by the transformation matrix to generate the second set of coefficients.

9. Analog-to-digital conversion circuitry, comprising:
an analog-to-digital converter (ADC); and
a non-linearity correction circuit coupled to an output of the ADC, the non-linearity correction circuit comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to:
retrieve the first set of coefficients from the coefficient storage; and
process the first set of coefficients to generate a second set of coefficients for correcting non-linearity of the ADC at a second sampling rate; and

correction circuitry configured to apply the second set of coefficients to correct non-linearity in output of the ADC while the ADC is operating at the second sampling rate;

wherein:
the first set of coefficients is for correcting the non-linearity of the ADC for a predetermined band of signal; and
the coefficient transformation circuitry is configured to generate the second set of coefficients for a different band of the signal with the band being within the predetermined band.

10. The analog-to-digital conversion circuitry of claim 9 , wherein the different band is narrower than and within the predetermined bandwidth, and the coefficient transformation circuitry is configured to generate the second set of coefficients for fewer than a number of terms corresponding to the first set of coefficients based on the second band being narrower than and within the predetermined band.

11. Analog-to-digital conversion circuitry, comprising:
an analog-to-digital converter (ADC); and
a non-linearity correction circuit coupled to an output of the ADC, the non-linearity correction circuit comprising:
coefficient storage encoded with a first set of coefficients for correcting non-linearity of the ADC at a first sampling rate;
coefficient transformation circuitry coupled to the coefficient storage, the coefficient transformation circuitry configured to:
retrieve the first set of coefficients from the coefficient storage; and
process the first set of coefficients to generate a second set of coefficients for correcting non-linearity of the ADC at a second sampling rate; and

correction circuitry configured to apply the second set of coefficients to correct non-linearity in output of the ADC while the ADC is operating at the second sampling rate;

Assignees

• Texas Instruments Inc

Inventors

• Tangudu Jawaharlal
• Sriram Chandrasekhar

Classifications

• H03M1/0854

  of quantisation noise · CPC title

• H03M1/0836 Primary

  of phase error, e.g. jitter · CPC title

• H03M1/08 Primary

  of noise {(H03M1/0617 takes precedence)} · CPC title

• H03M1/06

  Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, {e.g. by using stored correction values,} H03M1/10) · CPC title

• H03M1/1042

  the look-up table containing corrected values for replacing the original digital values (H03M1/1052 takes precedence) · CPC title