Printed circuit board having a signal conductor disposed adjacent one or more trenches filled with a low-loss ambient medium

Patent metadata

Field	Value
Publication number	US-9935353-B2
Application number	US-201514862159-A
Country	US
Kind code	B2
Filing date	Sep 23, 2015
Priority date	Sep 23, 2015
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

A conductor in a laminar structure, such as a printed circuit board or thin-film stack, is closely flanked by at least one open trench filled with an ambient medium (e.g., air, another gas, vacuum) of a lower dielectric loss than the conductor's surrounding dielectric. The trench may be made by any suitably precise method such as laser scribing, chemical etching or mechanical displacement. A thin layer of dielectric may be left on the sides of the conductor to prevent oxidation or other reactions that may reduce conductivity. When the conductor carries a signal, part of an electric and/or magnetic field that would ordinarily travel through the surrounding dielectric encounters the low-loss ambient medium (e.g. air) in the trench. The effective dielectric loss surrounding the conductor is lowered, reducing signal attenuation and crosstalk, particularly at high frequencies.

First claim

We claim:

1. A device, comprising:
a substrate;
a conductor laminated onto the substrate;
a first dielectric layer disposed on a top surface and sides of the conductor;
a second dielectric layer disposed on the substrate; and
a first open trench disposed in the second dielectric layer and filled with a low-loss ambient medium of nitrogen or argon,
wherein the first open trench is disposed between the second dielectric layer and the conductor, and
wherein the first open trench intersects an electromagnetic field induced in the first dielectric layer by a signal traveling in the conductor.

2. The device of claim 1 , further comprising a second open trench disposed in the second dielectric layer on an opposite side of the conductor from the first open trench,
wherein the second open trench is filled with the low-loss ambient medium, and
wherein the second open trench intersects an envelope of the electromagnetic field induced in the first dielectric layer by the signal traveling in the conductor.

3. The device of claim 1 , wherein the first open trench does not contact a conductive material of the conductor.

4. The device of claim 1 , wherein the conductor is a single-ended signal trace.

5. The device of claim 1 , wherein the conductor is a pair of traces carrying a differential signal.

6. The device of claim 5 , further comprising a third open trench disposed in the second dielectric layer between the pair of traces;
wherein the third open trench is filled with the low-loss ambient medium, and
wherein the third open trench intersects an envelope of the electromagnetic field induced in the first dielectric layer by the signal traveling in the conductor.

7. The device of claim 1 , further comprising a first ground line on a first side of the conductor.

8. The device of claim 7 , wherein the conductor comprises a microstrip or a planar waveguide.

9. The device of claim 7 , further comprising a second ground line on a second side of the conductor, wherein the second side of the conductor is opposite the first side of the conductor.

10. A printed circuit board, comprising:
a first dielectric layer;
a conductor adjacent to the first dielectric layer, a portion of the first dielectric layer disposed on a top surface of the conductor,
wherein the conductor is disposed in a signal plane on the first dielectric layer; and
one or more open trenches adjacent to the conductor on the opposite side of the first dielectric layer,
wherein the one or more open trenches are parallel to the conductor, intersect an electromagnetic field induced in the first dielectric layer by a signal traveling in the conductor, and are filled with a low-loss ambient medium of nitrogen or argon.

11. The printed circuit board of claim 10 , further comprising a ground backing layer under the first dielectric layer.

12. The printed circuit board of claim 10 , wherein the first dielectric layer comprises an epoxy.

13. The printed circuit board of claim 10 , wherein the first dielectric layer comprises resin-impregnated cloth.

14. The printed circuit board of claim 10 , wherein a plating is applied to the conductor.

15. A method, comprising:
upon a substrate that has a composite dielectric layer,
forming a pair of conductive microstrips on the composite dielectric layer;
forming a plurality of trenches adjacent to the conductive microstrips wherein the plurality of trenches extend through the composite dielectric layer, and

wherein the plurality of trenches are filled with nitrogen or argon;
assembling a mount on a top surface of each conductive microstrip; and
assembling at least one electrical component on a top surface of the pair of conductive microstrips.

16. The method of claim 15 , wherein the pair of conductive microstrips are laminated on the composite dielectric layer.

17. The method of claim 15 , wherein the plurality of trenches are formed by at least one of laser ablation, photodisruption, laser cutting, thermal cutting, mechanical displacement, reactive-ion etching, or wet chemical etching.

18. The method of claim 15 , wherein the plurality of trenches are round-bottomed.

Assignees

• Intel Corp

Inventors

• Ouyang Gong
• Huang Shaowu
• Xiao Kai

Classifications

• H05K2201/09872

  Insulating conformal coating · CPC title

• H05K1/0245

  Lay-out of balanced signal pairs, e.g. differential lines or twisted lines · CPC title

• H01P11/003

  Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines · CPC title

• H05K1/024

  Dielectric details, e.g. changing the dielectric material around a transmission line · CPC title

• H05K2201/09036

  Recesses or grooves in insulating substrate · CPC title