Tunable evanescent-mode cavity filter with closed loop control

US9935349B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9935349-B2
Application numberUS-201514974324-A
CountryUS
Kind codeB2
Filing dateDec 18, 2015
Priority dateDec 18, 2014
Publication dateApr 3, 2018
Grant dateApr 3, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An evanescent-mode cavity filter with an improved MEMS tuner design is disclosed. The MEMS tuner design allows for the independent control of individual poles in a multi-pole filter, which increases the adaptability of the filter in a crowded RF environment. The filter is further designed to minimize tuning voltages and hysteresis effects. A closed loop control system provides highly responsive tuning of the filter. The closed loop control allows for accurate and stable tuning that compensates for temperature and vibrational effects, while the tuner design enables fast tuning and significantly increases the resolution of the feedback measurement by eliminating charge buildup in the tuner substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A tunable, evanescent-mode cavity filter, comprising: a substrate having a cavity formed therein; a capacitive post disposed in the cavity of the substrate; a flexible diaphragm over and separated from the capacitive post by a gap; an actuator disposed adjacent to the flexible diaphragm and configured to vary the gap between the flexible diaphragm and the capacitive post; and a capacitive sense terminal coupled to the actuator for measuring a capacitance associated with a notch frequency of the filter, wherein the actuator and the capacitive sense terminal are each configured to be coupled to a closed loop control system for tuning the filter; and wherein said closed loop control system further comprises a converter configured to convert the measured capacitance into a digital signal; a controller configured to convert the digital signal into a voltage control signal; and a voltage driver configured to generate a high voltage signal for tuning the filter based on the voltage control signal. 2. The filter of claim 1 , wherein the controller includes a field programmable gate array (FPGA). 3. The filter of claim 1 , wherein the filter is coupled to the closed loop control system. 4. The filter of claim 1 , wherein the actuator comprises: a substrate having an opening therethrough, the opening being adjacent to the flexible diaphragm; a dielectric layer disposed on the substrate and over the opening; and an electrical contact directly coupled to a portion of the dielectric layer that is over the opening. 5. The filter of claim 4 , wherein the actuator further comprises: a dielectric spacer disposed adjacent to the electrical contact, thereby providing for a dielectric-barrier to prohibit the accumulation of sensing charge and bias charge in the actuator substrate. 6. The filter of claim 1 , wherein the filter comprises a plurality of actuators, wherein each actuator is configured to be decoupled from each of the other actuators to enable independent tuner control and sensing. 7. The filter of claim 1 , wherein the filter is configured to have a tunable response in a range of frequencies between approximately 1 gigahertz and 110 gigahertz. 8. The filter of claim 1 , wherein the filter is configured to provide absorptive rejection over 60 decibels and a tunable response within an operational frequency band of between approximately 1 gigahertz and 110 gigahertz. 9. A method of tuning an evanescent-mode cavity filter, the method comprising: measuring, via a capacitive sense terminal, a capacitance of a filter; converting the measured capacitance into a digital signal; converting the digital signal into a voltage control signal; and generating a high voltage signal for tuning the filter based on the voltage control signal, wherein the filter comprises: a substrate having a cavity formed therein; a capacitive post disposed in the cavity of the substrate; a flexible diaphragm over and separated from the capacitive post by a gap; and an actuator coupled to the capacitive sense terminal and disposed adjacent to the flexible diaphragm, the actuator being configured to vary the gap between the flexible diaphragm and the capacitive post. 10. The method of claim 9 , wherein the converting of the measured capacitance into a digital signal comprises generating a pulse width modulated digital signal. 11. The method of claim 9 , wherein the actuator comprises: a substrate having an opening therethrough, the opening being adjacent to the flexible diaphragm; a dielectric layer disposed on the substrate and over the opening; and an electrical contact directly coupled to a portion of the dielectric layer that is over the opening. 12. The method of claim 11 , wherein the actuator further comprises: a dielectric spacer disposed adjacent to the electrical contact, thereby providing for a dielectric-barrier to prohibit the accumulation of sensing charge and bias charge in the actuator substrate. 13. The method of claim 9 , wherein the filter comprises a plurality of actuators, and wherein the method comprises decoupling each of the actuators from each of the other actuators to enable independent tuner control and sensing. 14. The method of claim 9 , wherein the filter is configured to have a tunable response in a range of frequencies between approximately 1 gigahertz and 110 gigahertz. 15. The method of claim 9 , wherein the filter is configured to provide absorptive rejection over 60 decibels and a tunable response within an operational frequency band of between approximately 1 gigahertz and 110 gigahertz. 16. A tunable filter, comprising: an evanescent-mode cavity filter; and a closed loop control means for tuning the evanescent-mode cavity filter based on a measured capacitance associated with a notch frequency of the evanescent-mode cavity filter, wherein the closed loop control means further comprises a converter configured to convert the measured capacitance into a digital signal; a controller configured to convert the digital signal into a voltage control signal; and a voltage driver configured to generate a high voltage signal for tuning the evanescent-mode cavity filter based on the voltage control signal. 17. The filter of claim 16 , wherein the evanescent-mode cavity filter comprises: a flexible diaphragm; a substrate having an opening therethrough, the opening being adjacent to the flexible diaphragm; a dielectric layer disposed on the substrate and over the opening; and an electrical contact directly coupled to a portion of the dielectric layer that is over the opening. 18. The filter of claim 17 , wherein the evanescent-mode cavity filter further comprises: a dielectric spacer disposed adjacent to the electrical contact, thereby providing for a dielectric-barrier to prohibit the accumulation of sensing charge and bias charge in the substrate.

Assignees

Inventors

Classifications

  • integrated in a substrate · CPC title

  • Arrangements for compensating for variations of physical values, e.g. temperature · CPC title

  • H01P1/219Primary

    Evanescent mode filters · CPC title

  • of single resonant circuit by varying inductance only or capacitance only · CPC title

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What does patent US9935349B2 cover?
An evanescent-mode cavity filter with an improved MEMS tuner design is disclosed. The MEMS tuner design allows for the independent control of individual poles in a multi-pole filter, which increases the adaptability of the filter in a crowded RF environment. The filter is further designed to minimize tuning voltages and hysteresis effects. A closed loop control system provides highly responsive…
Who is the assignee on this patent?
Johnson Thomas J, Chuang Jack, Peroulis Dimitrios, and 9 more
What technology area does this patent fall under?
Primary CPC classification H01P1/219. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 03 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).