Methods for manufacturing semiconductor device and for detecting end point of dry etching

Patent metadata

Field	Value
Publication number	US-9935023-B2
Application number	US-201715630385-A
Country	US
Kind code	B2
Filing date	Jun 22, 2017
Priority date	Aug 27, 2015
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.

First claim

What is claimed is:

1. A manufacturing method of a semiconductor device, comprising the steps of:
(a) forming, over a main surface of a semiconductor substrate, laminated wiring including, sequentially from below, three layers of a titanium nitride film, an aluminum film, and a titanium nitride film;
(b) forming an insulating film over the laminated wiring so as to cover the laminated wiring;
(c) coating a photoresist film over the insulating film in order to form a via hole pattern by lithography; and
(d) forming a via hole in the insulating film by dry etching using the via hole pattern as a mask,
wherein, when the dry etching of the insulating film is performed, an end point of the dry etching of the insulating film is detected by monitoring emission intensities of at least CO and CN.

2. The manufacturing method of a semiconductor device according to claim 1 ,
wherein the insulating film is a silicon oxide film, and the dry etching is performed by using etching gas containing a fluorine component.

3. The manufacturing method of a semiconductor device according to claim 1 ,
wherein operational processing is performed using the monitored emission intensities of CO and CN, and the end point of the dry etching of the insulating film is detected based on a result of the operational processing.

4. The manufacturing method of a semiconductor device according to claim 3 ,
wherein the end point of the dry etching of the insulating film is detected based on a CO/CN ratio and an Al/CN ratio.

5. The manufacturing method of a semiconductor device according to claim 1 ,
wherein the dry etching of the insulating film includes a main etching step and an over-etching step, and emission intensity of AlF is monitored at least in the over-etching step.

6. The manufacturing method of a semiconductor device according to claim 5 ,
wherein a state of the dry etching is monitored by performing secondary differential processing using the monitored emission intensity of AlF and by controlling an inflection point of a calculated secondary differential value.

7. The manufacturing method of a semiconductor device according to claim 6 ,
wherein, when a secondary differential value calculated from the emission intensity of AlF becomes more than a preset value, it is determined that abnormality has been caused in the dry etching, and an alarm is issued.

8. A method of detecting an end point of dry etching comprising:
monitoring emission intensities of at least CO and CN of emission spectra of plasma to be used for dry etching; and
detecting an end point of the dry etching based on the monitored emission intensities of CO and CN.

9. The method of detecting an end point of dry etching according to claim 8 ,
wherein the dry etching is used for forming a via hole in a silicon oxide film formed over aluminum wiring, and is performed by using etching gas containing a fluorine component.

10. The method of detecting an end point of dry etching according to claim 8 ,
wherein operational processing is performed using the monitored emission intensities of CO and CN, and an end point of dry etching is detected based on a result of the operational processing.

11. The method of detecting an end point of dry etching according to claim 10 ,
wherein an end point of dry etching is detected based on a CO/CN ratio and an Al/CN ratio.

12. The method of detecting an end point of dry etching according to claim 8 ,
wherein the dry etching includes a main etching step and an over-etching step, and emission intensity of AlF is monitored at least in the over-etching step.

13. The method of detecting an end point of dry etching according to claim 12 ,
wherein a state of the dry etching is monitored by performing secondary differential processing using the monitored emission intensity of AlF and by controlling an inflection point of a secondary differential value from the secondary differential processing.

14. The method of detecting an end point of dry etching according to claim 13 ,
wherein, when a secondary differential value calculated from the emission intensity of AlF becomes more than a preset value, it is determined that abnormality has been caused in the dry etching, and an alarm is issued.

15. A manufacturing method of a semiconductor device, comprising the steps of:
(a) forming, over a main surface of a semiconductor substrate, laminated wiring including, sequentially from below, three layers of a titanium nitride film, an aluminum film, and a titanium nitride film;
(b) forming an insulating film over the laminated wiring so as to cover the laminated wiring;
(c) coating a photoresist film over the insulating film in order to form a via hole pattern by lithography; and
(d) forming a via hole in the insulating film by dry etching using the via hole pattern as a mask,
wherein, when the dry etching of the insulating film is performed, an end point of the dry etching of the insulating film is detected by monitoring emission intensities of at least two of CO, CN and AlF.

Assignees

• Renesas Electronics Corp

Inventors

• Hanawa Toshikazu
• Fukaya Kazuhide
• Yamada Kentaro

Classifications

• H10P50/283

  by chemical means · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title

• H10W20/48

  Insulating materials thereof · CPC title