Apparatus and method for performing burst triggering in a test and measurement instrument

Patent metadata

Field	Value
Publication number	US-9934355-B2
Application number	US-201313861998-A
Country	US
Kind code	B2
Filing date	Apr 12, 2013
Priority date	Mar 9, 2009
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

A test and measurement apparatus, system, and method for synchronizing an acquisition or triggering system to a specific burst of interest. The subject apparatus and method triggers on varying energy content of a signal qualified by time in the presence of high-frequency input signal bursts, by using an adjustable pulse width envelope detector, disposed in the signal path of the trigger circuitry, as a digital rectifier or to otherwise process and extract an envelope signal. An RF envelope probe having an analog envelope detector among other suitable components is disclosed. A method is implemented for isolating an interval of interest in a signal under test. An envelope detector circuit produces an envelope signal from the signal. Trigger circuitry receives the envelope signal from the envelope detector, and isolates the interval of interesting in the signal under test using the envelope signal.

First claim

What is claimed is:

1. A test and measurement instrument, comprising:
an input terminal to receive a signal under test;
an envelope detector digital circuit coupled to the input terminal and structured to receive the signal under test and produce a digital envelope signal from the signal under test; and
trigger circuitry coupled to the envelope detector digital circuit, the trigger circuitry structured to isolate a burst in the signal under test using the digital envelope signal.

2. The test and measurement instrument of claim 1 , wherein the envelope detector digital circuit comprises:
a delay circuit to receive the signal under test; and
a logic gate to receive the signal under test and a delayed signal from the delay circuit, wherein the logic gate is structured to produce the digital envelope signal using the signal under test and the delayed signal.

3. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to isolate a gap in the signal under test using the digital envelope signal.

4. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to receive the digital envelope signal and to isolate the burst in the signal under test having a defined width corresponding to a pulse in the digital envelope signal.

5. The test and measurement instrument of claim 4 , wherein the defined width corresponds to one of (a) a range of widths within predetermined bounds and (b) a range of widths outside of predetermined bounds.

6. The test and measurement instrument of claim 5 , wherein the defined width corresponds to a range of widths outside of predetermined bounds.

7. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to receive the digital envelope signal and to isolate a gap in the signal under test having a defined width corresponding to a pulse in the digital envelope signal.

8. The test and measurement instrument of claim 7 , wherein the defined width corresponds to one of (a) a range of widths within predetermined bounds and (b) a range of widths outside of predetermined bounds.

9. The test and measurement instrument of claim 8 , wherein the defined width corresponds to a range of widths outside of predetermined bounds.

10. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to receive the digital envelope signal and to count a plurality of bursts in the signal under test corresponding to a plurality of pulses in the digital envelope signal.

11. The test and measurement instrument of claim 10 , wherein the trigger circuitry is structured to isolate one of the plurality of bursts when the count exceeds a threshold.

12. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to receive the digital envelope signal and to isolate a burst glitch in the signal under test using the envelope signal.

13. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to receive the digital envelope signal and to timeout after a period of time during which no burst is detected using the digital envelope signal.

14. The test and measurement instrument of claim 1 , wherein the trigger circuitry is structured to receive the digital envelope signal and to cause a trigger event in association with the burst based on a trigger level set in relation to the digital envelope signal.

15. A test and measurement instrument, comprising:
an input terminal to receive a signal under test;
an envelope detector digital circuit to produce an envelope signal from the signal under test; and
trigger circuitry to receive the envelope signal and to isolate an interval of interest within the signal under test using the envelope signal; the test and measurement instrument further comprising
a counter coupled to the envelope detector to extend a pulse of the envelope signal.

16. The test and measurement instrument of claim 15 , further comprising a comparator to receive the signal under test and to reference the signal under test to a threshold voltage.

17. The test and measurement instrument of claim 15 , further comprising timer circuitry coupled to the envelope detector to process time intervals between transitions of the envelope signal.

18. The test and measurement instrument of claim 15 , further comprising:
a preamplifier to receive and amplify the signal under test;
a comparator coupled to the preamplifier and structured to reference the amplified signal to a threshold voltage;
an over-sampler coupled to an output of the comparator, wherein the over-sampler is structured to produce an output signal having replicated digital values; and
a counter coupled to an output of the envelope detector digital circuit, wherein the envelope detector digital circuit is coupled to the over-sampler and structured to receive the output signal having the replicated digital values, and to produce a logical high signal for each transition of the output signal of the over-sampler; and
wherein the counter is structured to extend a digital value received from the output of the envelope detector digital circuit.

19. The test and measurement instrument of claim 15 , further comprising:
a graphical user interface including a trigger type selection option having selections for at least one of (a) trigger serial burst width, (b) trigger serial gap width, (c) trigger serial envelope rise time, (d) trigger serial envelope fall time, (e) trigger serial glitch, (f) trigger serial timeout, and (g) trigger serial level.

20. The test and measurement instrument of claim 15 , further comprising a calibration unit to convert the type of units for which a signal is displayed according to a user selection.

21. The test and measurement instrument of claim 20 , wherein the signal is displayed in units of at least one of decibel units (dBm), decibel micro volts (dBμV), and watts (W).

Assignees

• Tektronix Inc

Inventors

• Smith Patrick A
• Kelly David L
• Tran Que T
• Hazzard Shane A

Classifications

• G01R13/0254

  for triggering, synchronisation · CPC title

• G01R13/02

  for displaying measured electric variables in digital form · CPC title

• G01R31/02

  Physics · mapped topic

• G06F19/00 Primary

  Physics · mapped topic

• G16Z99/00

  Subject matter not provided for in other main groups of this subclass · CPC title