Data storage system with dynamic throttling of parallel sub-I/O request for individual host I/O requests

Patent metadata

Field	Value
Publication number	US-9934172-B1
Application number	US-201514972418-A
Country	US
Kind code	B1
Filing date	Dec 17, 2015
Priority date	Dec 17, 2015
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

A method in a data storage system includes receiving a host I/O request from a host-side interface specifying a range of logical block addresses (LBAs) of a mapped logical storage unit (MLU) mapped through a device-side interface to underlying units of storage. Mapping information is obtained for extents of the underlying logical storage units mapped to sub-ranges of the range of LBAs. Sub-I/O requests for the extents are concurrently issued to the device-side interface based on the mapping information, subject to a throttling mechanism to manage performance. The device-side interface provides transfer initiation responses to initiate transfer of the extents, the responses being forwarded to the host-side interface to cause the host-side interface to transfer the extents in a transfer phase. The transfer initiation responses may be re-ordered as necessary to enable the host-side interface to transfer the extents in address order in satisfaction of the host I/O request.

First claim

What is claimed is:

1. A method of operating a data storage system, comprising:
receiving a host I/O request from a host-side interface of the data storage system, the host I/O request specifying a range of logical block addresses (LBAs) of a mapped logical unit (MLU) of storage presented to an external host computer by the host-side interface, the MLU being mapped through a device-side interface to a plurality of underlying logical units of storage;
obtaining, in response to receiving the host I/O request, mapping information for a plurality of extents of the underlying logical units of storage, the extents being mapped to respective sub-ranges of the range of LBAs, the host-side interface being configured to transfer the extents during a subsequent transfer phase;
concurrently issuing to the device-side interface, using the mapping information, a plurality of sub-I/O requests for the extents of the underlying logical units of storage, the device-side interface providing respective transfer initiation responses for the sub-I/O requests to initiate transfer of the respective extents;
dynamically throttling a number of concurrently issued sub-I/O requests according to a limit set either by configuration or by automatic calculation from performance monitoring over one or more intervals; and
receiving the transfer initiation responses from the device-side interface and forwarding the transfer initiation responses to the host-side interface to cause the respective extents to be transferred by the host-side interface in the transfer phase,
wherein:
the extents have a logical order according to an address order of the respective sub-ranges of the range of LBAs, and the host-side interface is configured to transfer the extents in the logical order during the transfer phase;
the transfer initiation responses are returned in an initial order independent of the logical order of the respective extents; and
forwarding the transfer initiation responses includes selectively re-ordering the transfer initiation responses as necessary to provide the transfer initiation responses to the host-side interface in the logical order of the respective extents,

and wherein selectively re-ordering the transfer initiation responses includes:
detecting an out-of-order transfer initiation response for one of the extents, the one extent being preceded in the logical order by a preceding extent for which a transfer initiation response has not yet been received;
refraining from forwarding the out-of-order transfer initiation response to the host-side interface;
at a later time when the transfer initiation response for the preceding extent has been received and forwarded to the host-side interface, re-issuing the sub-I/O request for the one extent to the device-side interface, the device-side interface subsequently providing a second transfer initiation response for the re-issued sub-I/O request; and
receiving the second transfer initiation response from the device-side interface and forwarding the second transfer initiation response to the host-side interface to cause the one extent to be transferred by the host-side interface in the transfer phase.

2. The method of claim 1 , further including, as part of refraining from forwarding the out-of-order transfer initiation response, issuing a sub-I/O request completion message to the device-side interface to abort transfer of the one extent, the sub-I/O request completion message including a retry indicator indicating that the sub-I/O request for the one extent will be reissued at a later time as part of the selective re-ordering.

3. The method of claim 1 , wherein:
the device-side interface includes a memory-based storage cache for caching the underlying units of logical storage of the MLU;
the data transfer phase includes transfer of the extents between the host-side interface and the storage cache; and
the initial order of the transfer initiation responses is based on a pattern of cache hits and misses for the respective extents in the storage cache, a cache hit for a given extent causing immediate return of a corresponding transfer initiation response which is out of order when not preceded by a transfer initiation response for a preceding extent in the logical order due to a cache miss for the preceding extent.

4. The method of claim 1 , wherein obtaining the mapping information includes (1) issuing a request for the mapping information to a mapping library, and (2) receiving a mapping information response including identifications of the plurality of extents, and wherein the plurality of sub-I/O requests are issued concurrently after receiving the mapping information response.

5. The method of claim 4 , wherein the mapping library includes separate fast and slow lookup paths for efficient lookup of mapping information for different mapped device types including a direct-mapped logical unit (DLU) and a thin logical unit (TLU), a lookup for the DLU being performed on the fast path and generally returning a single mapping value for an extent spanning an LBA range of a DLU host I/O request, a lookup for the TLU generally returning a plurality of mapping values for a set of respective distinct extents for an LBA range of a TLU host I/O request, and wherein the MLU is a TLU and the mapping information is obtained using the slow path.

6. The method of claim 5 , wherein the DLU has a base and associated snapshots maintained as TLU types with respect to the base, and wherein a lookup for the DLU on the fast path is responded to with an indication that a lookup should be performed on the slow path due to the presence of the associated snapshots for which the mapping information includes a plurality of mapping values.

7. The method of claim 1 , wherein:
the host I/O request is a file I/O request for a portion of a file, the portion of the file being stored in a buffer for transfer during the transfer phase;
the extents have a logical order according to an address order of the respective sub-ranges of the range of LBAs, and the host-side interface is configured to transfer the extents to or from the buffer;
the transfer initiation responses are returned in a response order independent of the logical order of the respective extents; and
the transfer initiation responses are forwarded irrespective of the logical order of the respective extents.

8. The method of claim 1 , wherein the data storage system gathers response times for sub-I/O requests over set of intervals and dynamically switches concurrency so an optimum number of concurrent sub-I/O requests are permitted to be processed at a time, the optimum number being calculated as providing a desired response time profile for the sub-I/O requests over the intervals.

9. The method of claim 1 , wherein the data storage system monitors for out-of-offset conditions for sub-I/O requests and dynamically switches concurrency to reduce the number of out-of-offset conditions to below a predetermined threshold representing an acceptable upper limit of out-of-offset count.

10. A method of operating a data storage system, comprising:
receiving a host I/O request from a host-side interface of the data storage system, the host I/O request specifying a range of logical block addresses (LBAs) of a mapped logical unit (MLU) of storage presented to an external host computer by the host-side interface, the MLU being mapped through a device-side interface to a plurality of underlying logical units of storage;
obtaining, in response to receiving the host I/O request, mapping information for a plurality of extents of the underlying logical units of storage, the extents being mapped to respective sub-ranges of the range of LBAs, the host-side interface being configur

Assignees

• Emc Corp
• Emc Ip Holding Co Llc

Inventors

• Koli Milind M
• Ng Timothy C
• Holt James M

Classifications

• G06F13/102

  where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52) · CPC title

• G06F13/1642 Primary

  with request queuing · CPC title