Systems and methods for built-in self test of low dropout regulators

Patent metadata

Field	Value
Publication number	US-9933802-B1
Application number	US-201715476062-A
Country	US
Kind code	B1
Filing date	Mar 31, 2017
Priority date	Mar 31, 2017
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

A low dropout regulator (LDO) system includes a first pseudo random binary sequence (PRBS) generator configured to output a first PRBS signal; an LDO configured to output an LDO output signal and having an error amplifier, wherein the first PRBS generator is coupled to an input of the error amplifier; a second PRBS generator configured to output a second PRBS signal; and a correlator coupled to the LDO and second PRBS generator and configured to correlate the LDO output signal with the second PRBS signal to provide an impulse response data sample of the LDO.

First claim

What is claimed is:

1. A low dropout regulator (LDO) system, comprising:
a first pseudo random binary sequence (PRBS) generator configured to output a first PRBS signal;
an LDO having an error amplifier and configured to output an LDO output signal, wherein the first PRBS generator is coupled to an input of the error amplifier;
a second PRBS generator configured to output a second PRBS signal; and
a correlator coupled to the LDO and second PRBS generator and configured to correlate the LDO output signal with the second PRBS signal to provide an impulse response data sample of the LDO.

2. The LDO system of claim 1 , wherein the correlator is configured to provide the impulse response data sample while the LDO is in normal closed loop operation.

3. The LDO system of claim 1 , wherein the second PRBS signal is a same signal as the first PRBS signal but delayed by a delay time.

4. The LDO system of claim 3 , wherein the impulse response data sample of the LDO corresponds to a sample at the delay time, and wherein impulse response data samples corresponding to a plurality of different delay times correspond to an impulse response of the LDO.

5. The LDO system of claim 1 , wherein the correlator further comprises:
a multiplier configured to multiply the LDO output signal with the second PRBS signal to provide a multiply result; and
an integrator configured to integrate the multiply result to provide the impulse response data sample of the LDO.

6. The LDO system of claim 5 , further comprising:
a buffer configured to buffer the LDO output signal prior to providing the LDO output signal to the multiplier.

7. The LDO system of claim 6 , wherein the buffer is configured to convert a single ended signal to a differential signal, and selectively change a direct current (DC) level of the LDO output signal.

8. The LDO system of claim 5 wherein the multiplier comprises a gilbert cell mixer.

9. The LDO system of claim 1 , further comprising a control circuit configured to:
during a test mode, provide the first PRBS signal to the input of the error amplifier; and
during a non-test mode, decouple the first PRBS signal from the input of the error amplifier and couple a reference voltage terminal to the input of the error amplifier.

10. The LDO system of claim 9 , wherein the control circuit comprises:
an adder having a first input, a second input coupled to the reference voltage terminal, and an output coupled to the input of the error amplifier; and
a switch coupled between the first PRBS generator and the first input of the adder, wherein the switch is configured to transmit the first PRBS signal to the first input of the adder in response to being in the test mode and not transmit the first PRBS signal to the adder in response to being in the non-test mode.

11. The LDO system of claim 1 , wherein the first PRBS, the LDO, the second PRBS, and the correlator are all located on a single integrated circuit.

12. A method for testing a low dropout regulator (LDO) system having an LDO, the method comprising:
during a test mode:
providing a pseudo random binary sequence (PRBS) signal to an input of an error amplifier of the LDO;
while providing the PRBS signal to the input of the error amplifier and allowing the LDO to operate in normal closed loop operation, correlating an LDO signal output by the LDO with a delayed PRBS signal to provide an impulse response data sample of the LDO.

13. The method of claim 12 , wherein correlating comprises:
multiplying the LDO signal with the delayed PRBS signal to providing an intermediate result; and
integrating the intermediate result to provide the impulse response data sample.

14. The method of claim 13 , wherein correlating, prior to multiplying, further comprises:
converting the LDO signal to a differential signal; and
changing a DC level of the LDO signal.

15. The method of claim 12 , further comprising:
during a non-test mode, providing a reference voltage to the input of the error amplifier instead of the PRBS signal.

16. The method of claim 12 , wherein the delayed PRBS signal is delayed from the PRBS signal by a delay time, and the impulse response data sample of the LDO corresponds to a sample at the delay time.

17. The method of claim 16 , further comprising:
repeating correlating the LDO signal with the delayed PRBS signal using a different delay time for the delayed PRBS signal each time to provide an impulse response data sample at each of a plurality of different delay times, wherein the impulse response data samples at the plurality of different delay times correspond to an impulse response of the LDO.

18. A low dropout regulator (LDO) system, comprising:
a first pseudo random binary sequence (PRBS) generator configured to output a first PRBS signal;
an LDO having an error amplifier and configured to output an LDO output signal, wherein the first PRBS generator is coupled to an input of the error amplifier;
a second PRBS generator configured to output a second PRBS signal which is a delayed version of the first PRBS signal;
a multiplier configured to multiply the LDO output signal with the second PRBS signal to provide a multiply result;
an integrator configured to integrate the multiply result to provide an impulse response data sample of the LDO; and
a control circuit configured to:
during a test mode, provide the first PRBS signal to the first input of the error amplifier; and
during a non-test mode, decouple the first PRBS signal from the input of the error amplifier and couple a reference voltage terminal to the input of the error amplifier.

19. The LDO system of claim 18 , wherein the control circuit comprises:
an adder having a first input, a second input coupled to the reference voltage terminal, and an output coupled to the input of the error amplifier; and
a switch coupled between the first PRBS generator and the input of the adder, wherein the switch is configured to transmit the first PRBS signal to the first input of the adder in response to being in the test mode and not transmit the first PRBS signal to the adder in response to being in the non-test mode.

20. The LDO system of claim 18 , wherein, the LDO is configured to, during the test mode, operate in normal closed loop operation.

Assignees

• Nxp Usa Inc

Inventors

• Jeong Jae Woong
• Yilmaz Ender
• Winemberg Leroy

Classifications

• G01R31/2843

  In-circuit-testing · CPC title

• G01R31/40

  Testing power supplies (testing photovoltaic devices H02S50/10) · CPC title

• G05F5/00

  Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output · CPC title

• G01R31/30

  Marginal testing, e.g. by varying supply voltage (testing computers during standby operation or idle time G06F11/22) · CPC title

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title