Active element array substrate and display panel using the same

Patent metadata

Field	Value
Publication number	US-9933678-B1
Application number	US-201715651054-A
Country	US
Kind code	B1
Filing date	Jul 17, 2017
Priority date	Dec 28, 2016
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

An active element array substrate includes a substrate, first to third data lines extending along a first direction, first and second scan lines and a common electrode line extending along a second direction, and first to third sub-pixel units that are provided on the substrate. The first and third data lines respectively intersect with first and second adjacent ones of the first scan lines to define a pixel region. The second data line is located between the first and third data lines and passes through the pixel region. The first data line intersects with the second scan line and the common electrode line to define a plurality of sub-pixel regions in the pixel region. The first to third sub-pixel units are respectively provided in the sub-pixel regions and respectively electrically connected to the first data line and the first one of the first scan lines, the second data line and the second scan line, and the third data line and the second scan line.

First claim

What is claimed is:

1. An active element array substrate, comprising:
a substrate, comprising an active region and a peripheral region;
a first data line disposed on said substrate extending along a first direction;
a second data line disposed on said substrate extending along said first direction;
a third data line disposed on said substrate extending along said first direction, wherein said second data line is between said first data line and said third data line;
a first scan line disposed on said substrate extending along a second direction, wherein said second direction is different from said first direction;
a second scan line disposed on said substrate extending along said second direction;
a common electrode line disposed on said substrate extending along said second direction, wherein said common electrode line is between said first scan line and said second scan line;
a first sub-pixel unit electrically connected to said first data line and said first scan line;
a second sub-pixel unit electrically connected to said second data line and said second scan line; and
a third sub-pixel unit electrically connected to said third data line and said second scan line.

2. The active element array substrate according to claim 1 , wherein said first data line is distanced away from said third data line for a first length, said first scan line is distanced away from said common electrode line for a second length, and said first length is less than said second length.

3. The active element array substrate according to claim 1 , wherein said first scan line and said second scan line extend to said peripheral region, and said first scan line is electrically connected to said second scan line.

4. The active element array substrate according to claim 3 further comprises a gate driver located in the peripheral region, wherein said gate driver comprises a first pin, and both said first scan line and said second scan line are electrically connected to said first pin.

5. The active element array substrate according to claim 1 , wherein said first sub-pixel unit, said second sub-pixel unit, or said third sub-pixel unit comprises an active element and a first pixel electrode, and said first pixel electrode is electrically connected to said active element, and said first pixel electrode comprises:
a first trunk electrode, which extends along said second direction; and
a plurality of first branch electrodes electrically connected to said first trunk electrode and extending towards a plurality of different extension directions, wherein said extension directions are different from said first direction and said second direction.

6. The active element array substrate according to claim 5 , wherein said first sub-pixel unit, said second sub-pixel unit, or said third sub-pixel unit further comprises:
a second trunk electrode extending along said first direction and intersects with said first trunk electrode.

7. The active element array substrate according to claim 5 , wherein each of said first sub-pixel unit, said second sub-pixel unit, or said third sub-pixel unit further comprises a second pixel electrode and a connection electrode, said first pixel electrode and said second pixel electrode are connected via said connection electrode, and said second pixel electrode comprises a second trunk electrode and a plurality of second branch electrodes; and said second data line is positioned between said first electrode and said second electrode.

8. The active element array substrate according to claim 7 , wherein said plurality of first branch electrodes have a first extension direction and a second extension direction.

9. The active element array substrate according to claim 7 , wherein said plurality of first branch electrodes and said plurality of second branch electrodes have a first extension direction, a second extension direction, a third extension direction, and a fourth extension direction.

10. The active element array substrate according to claim 1 , wherein each of the first sub-pixel unit, the second sub-pixel unit, and the third sub-pixel unit comprises an active element and a pixel electrode, and the pixel electrode is electrically connected to the active element, and the active element array substrate further comprises:
a color filter, comprising:
a red photoresist, provided corresponding to the pixel electrode of the first sub-pixel region;
a green photoresist, provided corresponding to the pixel electrode of the second sub-pixel region; and
a blue photoresist, provided corresponding to the pixel electrode of the third sub-pixel region; and

a light shielding layer, covering the active element.

11. A display panel, comprising:
the active element array substrate according to claim 1 ;
an opposite substrate;
a liquid crystal layer, provided between the active element array substrate and the opposite substrate; and
two vertical alignment layers, respectively provided between the liquid crystal layer and the active element array substrate, and between the liquid crystal layer and the opposite substrate.

12. The display panel according to claim 11 , wherein the vertical alignment layers are formed by polymer stabilized materials.

13. The display panel according to claim 11 , wherein each of the first sub-pixel unit, the second sub-pixel unit, and the third sub-pixel unit comprises an active element and a pixel electrode, and the pixel electrode is electrically connected to the active element, and the active element array substrate further comprises:
a color filter, provided corresponding to the pixel electrode;
a light shielding layer, provided corresponding to the active element; and
at least one spacer, provided on the color filter, wherein a top end of the spacer is connected to the opposite substrate.

14. The display panel according to claim 11 , wherein the substrate of the active element array substrate and the opposite substrate bend along the second direction.

15. The display panel according to claim 11 , wherein each of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region has a first length in the first direction and has a second length in the second direction, and the first length is less than the second length.

Assignees

• Au Optronics Corp

Inventors

• Chen Yi-Jung
• Wu shang-jie
• Ho Sheng-Ju
• Lin Wen-Tsan

Classifications

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H01L27/02

  Electricity · mapped topic

• H01L21/82

  Electricity · mapped topic

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• G02F1/167

  by electrophoresis · CPC title