Charging a capacitor

Patent metadata

Field	Value
Publication number	US-9931947-B2
Application number	US-201314015527-A
Country	US
Kind code	B2
Filing date	Aug 30, 2013
Priority date	Aug 30, 2013
Publication date	Apr 3, 2018
Grant date	Apr 3, 2018

Abstract

In one example, a method comprises alternately switching on a first switch connected in series with a capacitor and connected in parallel with a first capacitive element, and a second switch connected in series with the capacitor and connected in parallel with a second capacitive element. Aeries circuit with the first switch, the capacitor and the second switch may be coupled to supply nodes for receiving a supply voltage.

First claim

What is claimed is:

1. A method, comprising:
alternately switching on a first switch and a second switch,
wherein a capacitor and a first capacitive element form a first capacitive voltage divider coupled between a first supply node and a second supply node when the first switch has been switched off and the second switch has been switched on,
wherein the capacitor and a second capacitive element form a second capacitive voltage divider coupled between the first supply node and the second supply node when the first switch has been switched on and the second switch has been switched off,
wherein a power source is coupled between the first supply node and the second supply node, and
wherein the alternately switching on the first switch and the second switch pre-charges the capacitor to reduce an inrush current; and
detecting a voltage level of a voltage across the capacitor and switching on the first switch and the second switch when the voltage level has reached a predefined level.

2. The method of claim 1 , wherein alternately switching on the first switch and the second switch comprise switching on only one of the first switch and the second switch at one time.

3. The method of claim 1 ,
wherein alternately switching on the first switch and the second switch comprises a plurality of timely subsequent switching cycles,
wherein each of the plurality of switching cycles comprises:
switching on the first switch for a first on-period, and, after the first on-period, switching on the second switch for a second on-period.

4. The method of claim 3 , wherein the first on-period and the second on-period are substantially equal.

5. The method of claim 3 , wherein the first on-period and the second on-period are substantially fixed time periods.

6. The method of claim 3 , wherein each of the plurality of switching cycles further comprises:
a first dead time after the first on-period and before the second on-period, and a second dead time after the second on-period and before the first on-period of a subsequent switching cycle.

7. The method of claim 1 , wherein the predefined level is higher than 80% of a voltage level of the supply voltage.

8. The method of claim 1 , wherein an inductor is connected in series with the capacitor.

9. The method of claim 8 , wherein at least one rectifier element is connected in parallel with a series circuit comprising the capacitor and the inductor.

10. The method of claim 1 , wherein at least one of the first capacitive element and the second capacitive element comprises a junction capacitor.

11. The method of claim 10 , wherein at least one of the first switch and the second switch comprises a MOSFET, wherein the junction capacitor is formed by a body region and a drift region of the MOSFET.

12. The method of claim 1 ,
wherein a first rectifier element is connected in series with the first capacitive element, and a series circuit with the first rectifier element and the first capacitive element is coupled in parallel with the first switch, and
wherein a second rectifier element is connected in series with the second capacitive element, and a series circuit with the second rectifier element and the second capacitive element is coupled in parallel with the second switch.

13. The method of claim 12 ,
wherein the first capacitive element is coupled to the capacitor through the second rectifier element, and
wherein the second capacitive element is coupled to the capacitor through the first rectifier element.

14. An electronic circuit comprising:
an input configured to be connected to a power source, the input comprising a first supply node and a second supply node,
an output configured to be connected to a capacitor,
a first switch connected between the input and the output,
a second switch connected between the input and the output, and
a control circuit configured to:
alternately switch on the first switch and the second switch,
wherein the alternately switching on the first switch and the second switch pre-charges the capacitor to reduce an inrush current,
wherein the capacitor and a first capacitive element form a first capacitive voltage divider coupled between the first supply node and the second supply node when the first switch has been switched off and the second switch has been switched on,
wherein the capacitor and a second capacitive element form a second capacitive voltage divider coupled between the first supply node and the second supply node when the first switch has been switched on and the second switch has been switched off, and
wherein the power source is coupled between the first supply node and the second supply node; and
detect a voltage level of a voltage at the output and to switch on the first switch and the second switch when the voltage level has reached a predefined level.

15. The electronic circuit of claim 14 , wherein, to alternately switch on the first switch and the second switch, the control circuit, is configured to switch on only one of the first switch and the second switch at one time.

16. The electronic circuit of claim 14 ,
wherein the control circuit is configured to drive the first switch and the second switch in a plurality of timely subsequent drive cycles, and
wherein the control circuit, in each drive cycle, is configured to switch on the first switch for a first on-period, and, after the first on-period, to switch on the second switch for a second on-period.

17. The electronic circuit of claim 16 , wherein the first on-period and the second on-period are substantially equal.

18. The electronic circuit of claim 16 , wherein the first on-period and the second on-period are substantially fixed time periods.

19. The electronic circuit of claim 16 , wherein the control circuit, in each drive cycle, is further configured to generate a first dead time after the first on-period and before the second on-period, and a second dead time after the second on-period and before the first on-period of a subsequent switching cycle.

20. The electronic circuit of claim 14 , wherein the predefined level is higher than 80% of a voltage level at the input.

21. The electronic circuit of claim 14 , wherein at least one of the first capacitive element and the second capacitive element comprises a junction capacitor.

22. The electronic circuit of claim 21 , wherein at least one of the first switch and the second switch comprises a MOSFET, wherein the junction capacitor is formed by a body region and a drift region of the MOSFET.

23. A switching circuit, comprising:
means for alternately switching on a first switch and a second switch,
wherein a capacitor and a first capacitive element form a first capacitive voltage divider coupled between a first supply node and a second supply node when the first switch has been switched off and the second switch has been switched on,
wherein the capacitor and a second capacitive element form a second capacitive voltage divider coupled between the first supply node and the second supply node when the first switch has been switched on and the second switch has been switched off,
wherein a power source is coupled between the first supply node and the second supply node, and
wherein the means for alternately switching on the first switch and the second switch pre-charges the capacitor to reduce an inrush current; and
means for detecting a voltage level of a voltage across the capacitor and means for switching on the first switch and the se

Assignees

• Infineon Technologies Ag

Inventors

• Roessler Werner

Classifications

• B60L2270/20

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• B60L50/40

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• B60L50/51 Primary

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• H02M1/34 Primary

  Snubber circuits · CPC title

• B60L15/007 Primary

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