Transaction expansion for NoC simulation and NoC design

Patent metadata

Field	Value
Publication number	US-9928204-B2
Application number	US-201514620642-A
Country	US
Kind code	B2
Filing date	Feb 12, 2015
Priority date	Feb 12, 2015
Publication date	Mar 27, 2018
Grant date	Mar 27, 2018

Abstract

Methods and example implementations described herein are generally directed to interconnect architecture, and more specifically, to generation of one or more expanded transactions for conducting simulations and/or NoC design. Aspects of the present disclosure include processing of input traffic specification that is given in terms of groups of hosts, requests, and responses to the requests, in order to generate one or more appropriate/correct expanded transactions that can be simulated.

First claim

What is claimed is:

1. A method, comprising:
for a traffic specification comprising one or more transactions, each of the one or more transactions being specified using one or more groups of transmitting and receiving interfaces, wherein at least one of the one or more groups comprises a plurality of transmitting and receiving interfaces, identifying one or more valid sequences of messages between individual ones of the transmitting and receiving interfaces that can occur during Network on Chip (NoC) system operation, the identifying the one or more valid sequences of messages comprising:
for each transaction of the one or more transactions:
for each of the one or more groups in the each transaction, determining the individual ones of the transmitting and receiving interfaces from the each of the of the one more groups in the each transaction;
generating one or more valid instances of the each transaction from the individual ones of the transmitting and receiving interfaces for the each of the one or more groups of the each transaction; and
including the one or more valid instances of the each transaction in the valid sequences of messages.

2. The method of claim 1 , wherein the identifying the one or more valid sequences of messages is based on determining hop types for each hop of the transactions.

3. The method of claim 2 , wherein the determining hop types is based on at least one of a message type, identifying request and response pairs, identifying singleton endpoints, and definition provided in the traffic specification.

4. The method of claim 1 , wherein the identifying the one or more valid sequences of messages comprises extending partial sequences based on destination filtering.

5. The method of claim 1 , further comprising determining bandwidth requirements of the traffic specification for NoC design based on valid sequences and a bandwidth combining function.

6. The method of claim 1 , further comprising providing instructions to a simulation tool based on conversion of the valid sequences into related messages.

7. The method of claim 6 , wherein the instructions provided to a simulation tool utilize only a subset of the valid sequences.

8. The method of claim 1 , wherein the one or more groups are marked to indicate the use of at least one of multicast, broadcast, and scatter-gather patterns, wherein the valid sequences comprise at least one of a valid multicast, broadcast, and scatter-gather patterns.

9. A non-transitory computer readable medium storing instructions for executing a process, the instructions comprising:
for a traffic specification comprising one or more transactions, each of the one or more transactions being specified using one or more groups of transmitting and receiving interfaces, wherein at least one of the one or more groups comprises a plurality of transmitting and receiving interfaces, identifying one or more valid sequences of messages between individual ones of the transmitting and receiving interfaces that can occur during Network on Chip (NoC) system operation, the identifying the one or more valid sequences of messages comprising:
for each transaction of the one or more transactions:
for each of the one or more groups in the each transaction, determining the individual ones of the transmitting and receiving interfaces from the each of the of the one more groups in the each transaction;
generating one or more valid instances of the each transaction from the individual ones of the transmitting and receiving interfaces for the each of the one or more groups of the each transaction; and

including the one or more valid instances of the each transaction in the valid sequences of messages.

10. The non-transitory computer readable medium of claim 9 , wherein the identifying the one or more valid sequences of messages is based on determining hop types for each hop of the transactions.

11. The non-transitory computer readable medium of claim 10 , wherein the determining hop types is based on at least one of a message type, identifying request and response pairs, identifying singleton endpoints, and definition provided in the traffic specification.

12. The non-transitory computer readable medium of claim 9 , wherein the identifying the one or more valid sequences of messages comprises extending partial sequences based on destination filtering.

13. The non-transitory computer readable medium of claim 9 , further comprising determining bandwidth requirements of the traffic specification for NoC design based on valid sequences and a bandwidth combining function.

14. The non-transitory computer readable medium of claim 9 , further comprising providing instructions to a simulation tool based on conversion of the valid sequences into related messages.

15. The non-transitory computer readable medium of claim 14 , wherein the instructions provided to a simulation tool utilize only a subset of the valid sequences.

16. The non-transitory computer readable medium of claim 9 , wherein the one or more groups are marked to indicate the use of at least one of multicast, broadcast, and scatter-gather patterns, wherein the valid sequences comprise at least one of a valid multicast, broadcast, and scatter-gather patterns.

Assignees

• Netspeed Systems
• Netspeed Systems Inc

Inventors

• Norige Eric
• Kumar Sailesh

Classifications

• H04L45/40

  Wormhole routing · CPC title

• G06F13/4221 Primary

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title