Resolving page faults out of context

Patent metadata

Field	Value
Publication number	US-9928142-B2
Application number	US-201514936947-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Nov 10, 2015
Publication date	Mar 27, 2018
Grant date	Mar 27, 2018

Abstract

Systems, methods, and computer program products to perform an operation comprising determining, by a processor, a process identifier of a process associated with a page fault based on an interrupt source number, wherein the page fault was triggered by a coherent accelerator, executing the process on the processor to recreate the page fault on the processor, and resolving the page fault by an operating system executing on the processor.

First claim

What is claimed is:

1. A method, comprising:
determining, by a processor, a process identifier of a process associated with a page fault based on an interrupt source number, wherein the page fault was triggered by a coherent accelerator;
creating a hidden thread handler in a kernel of the operating system;
executing, by the hidden thread handler, the process on the processor to recreate the page fault on the processor; and
resolving the page fault by an operating system executing on the processor.

2. The method of claim 1 , further comprising:
receiving, by the processor, an asynchronous interrupt generated by the coherent accelerator responsive to the page fault, wherein the asynchronous interrupt specifies the interrupt source number.

3. The method of claim 2 , wherein the processor is not executing the process associated with the page fault when the asynchronous interrupt is received and wherein the method further comprises:
upon determining the operating system has resolved the page fault, restarting the coherent accelerator; and
upon determining the page fault was not successfully resolved by the operating system, performing a predefined operation comprising at least one of: (i) causing the coherent accelerator to abort a command which generated the page fault, (ii) resetting a current hardware context executing on the coherent accelerator, and (iii) detaching a current hardware context from the coherent accelerator.

4. The method of claim 1 , wherein determining the process identifier comprises:
identifying a first hardware context associated with the process on the coherent accelerator using the interrupt source number, wherein the first hardware context specifies the interrupt source number and the process identifier, wherein the process identifier is unique to the process, wherein the first hardware context is of a plurality of hardware contexts stored in the coherent accelerator; and
returning the process identifier of the process from the hardware context on the coherent accelerator.

5. The method of claim 1 , wherein the process is executing on the processor prior to determining the process identifier, the method further comprising:
polling, by the process, the coherent accelerator to identify the page fault.

6. The method of claim 1 , wherein the page fault triggered by the coherent accelerator generates an asynchronous interrupt, wherein recreating the page fault on the processor generates a synchronous exception, wherein the page fault comprises an out of context page fault, wherein the coherent accelerator comprises a coprocessor.

7. A system, comprising:
a processor;
a coherent accelerator; and
a memory storing program code, which, when executed on the processor, performs an operation comprising:

determining, by the processor, a process identifier of a process associated with a page fault based on an interrupt source number, wherein the page fault was triggered by the coherent accelerator;
creating a hidden thread handler in a kernel of the operating system;
executing, by the hidden thread handler, the process on the processor to recreate the page fault on the processor; and
resolving the page fault by an operating system executing on the processor.

8. The system of claim 7 , the operation further comprising:
receiving, by the processor, an asynchronous interrupt generated by the coherent accelerator responsive to the page fault, wherein the asynchronous interrupt specifies the interrupt source number.

9. The system of claim 8 , wherein the processor is not executing the process associated with the page fault when the asynchronous interrupt is received and wherein the operation further comprises:
upon determining the operating system has resolved the page fault, restarting the coherent accelerator; and
upon determining the page fault was not successfully resolved by the operating system, performing a predefined operation comprising at least one of: (i) causing the coherent accelerator to abort a command which generated the page fault, (ii) resetting a current hardware context executing on the coherent accelerator, and (iii) detaching a current hardware context from the coherent accelerator.

10. The system of claim 7 , wherein determining the process identifier comprises:
identifying a first hardware context associated with the process on the coherent accelerator using the interrupt source number, wherein the first hardware context specifies the interrupt source number and the process identifier, wherein the process identifier is unique to the process, wherein the first hardware context is of a plurality of hardware contexts stored in the coherent accelerator; and
returning the process identifier of the process from the hardware context on the coherent accelerator.

11. The system of claim 7 , wherein the process is executing on the processor prior to determining the process identifier, the operation further comprising:
polling, by the process, the coherent accelerator to identify the page fault.

12. The system of claim 7 , wherein the page fault triggered by the coherent accelerator generates an asynchronous interrupt, wherein recreating the page fault on the processor generates a synchronous exception, wherein the page fault comprises an out of context page fault, wherein the coherent accelerator comprises a coprocessor.

13. A computer program product comprising:
a non-transitory computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code executable by one or more computer processors to perform an operation comprising:
determining, by a processor, a process identifier of a process associated with a page fault based on an interrupt source number, wherein the page fault was triggered by a coherent accelerator;
creating a hidden thread handler in a kernel of the operating system;
executing, by the hidden thread handler, the process on the processor to recreate the page fault on the processor; and
resolving the page fault by an operating system executing on the processor.

14. The computer program product of claim 13 , the operation further comprising:
receiving, by the processor, an asynchronous interrupt generated by the coherent accelerator responsive to the page fault, wherein the asynchronous interrupt specifies the interrupt source number.

15. The computer program product of claim 14 , wherein the processor is not executing the process associated with the page fault when the asynchronous interrupt is received and wherein the operation further comprises:
upon determining the operating system has resolved the page fault, restarting the coherent accelerator; and
upon determining the page fault was not successfully resolved by the operating system, performing a predefined operation comprising at least one of: (i) causing the coherent accelerator to abort a command which generated the page fault, (ii) resetting a current hardware context executing on the coherent accelerator, and (iii) detaching a current hardware context from the coherent accelerator.

16. The computer program product of claim 13 , wherein determining the process identifier comprises:
identifying a first hardware context associated with the process on the coherent accelerator using the interrupt source number, wherein the first hardware context specifies the interrupt source number and the process identifier, wherein the process identifier is unique to the process, wherein the first hardware context is of a plurality of hardware contexts stored in the coherent accelerator; and
returning the process identif

Assignees

• IBM

Inventors

• Aslot Vishal C
• Mealey Bruce
• Rogers Mark D
• Swanberg Randal C

Classifications

• G06F11/1402 Primary

  Saving, restoring, recovering or retrying · CPC title

• G06F2201/805

  Real-time · CPC title

• G06F11/0772

  Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title

• G06F11/079

  Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36) · CPC title

• G06F11/073

  in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00) · CPC title