Magnetic memory device and method for manufacturing the same

US9923138B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9923138-B2
Application numberUS-201615375734-A
CountryUS
Kind codeB2
Filing dateDec 12, 2016
Priority dateSep 12, 2014
Publication dateMar 20, 2018
Grant dateMar 20, 2018

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  2. Abstract

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  5. First independent claim

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Abstract

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A memory device includes a magnetic tunnel junction comprising a first free layer, a pinned layer, and a tunnel barrier layer disposed between the first free layer and the pinned layer, wherein the first free layer comprises a first free magnetic pattern adjacent to the tunnel barrier layer, and a second free magnetic pattern spaced apart from the tunnel barrier layer with the first free magnetic pattern interposed therebetween, wherein the second free magnetic pattern contacts the first free magnetic pattern, wherein the first and second free magnetic patterns include boron (B), wherein a boron content of the first free magnetic pattern is higher than a boron content of the second free magnetic pattern, and wherein the boron content of the first free magnetic pattern is in a range of about 25 at % to about 50 at %.

First claim

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What is claimed is: 1. A memory device comprising: a magnetic tunnel junction including a free layer; a pinned layer; and a tunnel barrier layer, the tunnel barrier layer being between the free layer and the pinned layer, wherein the free layer includes a first free magnetic portion adjacent to the tunnel barrier layer, and a second free magnetic portion spaced apart from the tunnel barrier layer with the first free magnetic portion therebetween, wherein the first free magnetic portion and the second free magnetic portion each include boron (B), the first free magnetic portion having a boron content higher than a boron content of the second free magnetic portion, the pinned layer includes a first pinned layer adjacent to the tunnel barrier layer, and a second pinned layer spaced apart from the tunnel barrier layer with an exchange coupling layer therebetween, the boron content of the first free magnetic portion is in a range of about 25 at % to about 50 at %, the first free magnetic portion and the second free magnetic portion each include cobalt-iron-boron (CoFeB), the first pinned layer and the second pinned layer each include boron, a boron content of the first pinned layer is higher than a boron content of the second pinned layer, the magnetic tunnel junction further includes a non-magnetic metal layer adjacent to the first free magnetic portion; and a capping layer spaced apart from the non-magnetic metal layer with the second free magnetic portion therebetween, the second free magnetic portion is spaced apart from the first free magnetic portion with the non-magnetic metal layer therebetween, the boron content of the first free magnetic portion is higher than the boron content of the second free magnetic portion, and the capping layer contacts one surface of the second free magnetic portion to induce interfacial perpendicular magnetic anisotropy (i-PMA). 2. The memory device of claim 1 , wherein the boron content of the second free magnetic portion is in a range of about 20 at % to about 35 at %. 3. The memory device of claim 1 , wherein the first pinned layer comprises: a polarization enhancement magnetic pattern adjacent to the tunnel barrier layer; and a middle magnetic pattern spaced apart from the tunnel barrier layer with the polarization enhancement magnetic pattern therebetween, wherein the middle magnetic pattern contacts the polarization enhancement magnetic pattern, a boron content of the middle magnetic pattern is higher than a boron content of the polarization enhancement magnetic pattern, and the boron content of the middle magnetic pattern is higher than a boron content of the second pinned layer. 4. The memory device of claim 3 , wherein the boron content of the middle magnetic pattern is substantially equal to the boron content of the first free magnetic portion. 5. The memory device of claim 4 , wherein the middle magnetic pattern includes iron-boron (FeB). 6. The memory device of claim 1 , wherein the boron content of the first free magnetic portion is about 40 at %.

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What does patent US9923138B2 cover?
A memory device includes a magnetic tunnel junction comprising a first free layer, a pinned layer, and a tunnel barrier layer disposed between the first free layer and the pinned layer, wherein the first free layer comprises a first free magnetic pattern adjacent to the tunnel barrier layer, and a second free magnetic pattern spaced apart from the tunnel barrier layer with the first free magnet…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L43/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).