Data replication across host systems via storage controller

US9921753B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9921753-B2
Application numberUS-201514666156-A
CountryUS
Kind codeB2
Filing dateMar 23, 2015
Priority dateMar 23, 2015
Publication dateMar 20, 2018
Grant dateMar 20, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments herein provide for redundant data storage. One storage system includes first and second host systems each comprising a memory and a persistent storage device. The storage system also includes first and second storage controllers each comprising a memory (e.g., DRAM). The memory of the first storage controller is mapped to the memory of the first host system and the memory of the second storage controller is mapped to the memory of the second host system. The first storage controller is operable to DMA data from the persistent storage device of the first host system to the memory of the first storage controller, and to direct the second storage controller to DMA the data to the persistent storage device of the second host system via the memory of the second storage controller.

First claim

Opening claim text (preview).

What is claimed is: 1. A storage system, comprising: first and second host systems each comprising a memory and configured with a persistent storage device; and first and second storage controllers each comprising a memory, wherein the first storage controller is communicatively coupled to the first host system and to the second storage controller, wherein the second storage controller is communicatively coupled to the second host system, wherein the memory of the first storage controller is mapped to the memory of the first host system and the memory of the second storage controller is mapped to the memory of the second host system, wherein the first storage controller is operable to direct memory access (DMA) data from the persistent storage device of the first host system to the memory of the first storage controller via a driver of the first host system that presents a signal to the first host system to allow the first host system to access a logical block address and a desired number of data blocks of the persistent storage device of the first host system by way of the first storage controller, and to direct the second storage controller to DMA the data to the persistent storage device of the second host system via the memory of the second storage controller, and wherein the first storage controller DMAs the data such that the data travels through the first and second host systems while bypassing one or more components of the first and second host systems. 2. The storage system of claim 1 , wherein: the first host system is operable to DMA other data to the first storage controller; the first storage controller is operable to DMA the other data from the first storage controller to the second storage controller; and the second storage controller is operable to DMA the other data to the second persistent storage device via the memory of the second storage controller. 3. The storage system of claim 1 , wherein: the driver comprises a remote DMA (RDMA) firmware module linked to the memory of the first storage controller and operable to direct the first storage controller to DMA the data from the persistent storage device of the first host system to the memory of the first storage controller. 4. The storage system of claim 3 , wherein: the RDMA firmware module is an Infiniband firmware module or an RDMA over Converged Ethernet firmware module. 5. The storage system of claim 3 , wherein: the first host system comprises a file system; and the one or more components bypassed includes the file system of the first host system. 6. The storage system of claim 1 , wherein: the first storage controller is a Mega-Redundant Array of Independent Disks controller. 7. A method for replicating data across first and second host systems, the method comprising: linking a first storage controller to a second storage controller, wherein the first storage controller is communicatively coupled to the first host system and the second storage controller is communicatively coupled to the second host system and wherein the first storage controller is communicatively coupled to a first persistent storage device of the first host system and the second storage controller is communicatively coupled to a second persistent storage device of the second host system; mapping a memory of the first host system to the first storage controller; mapping a memory of the second host system to the second storage controller; direct memory accessing (DMAing) data from the first persistent storage device to the memory of the first storage controller via a driver of the first host system that presents a signal to the first host system to allow the first host system to access a logical block address and a desired number of data blocks of the persistent storage device of the first host system by way of the first storage controller; and DMAing the data to the second persistent storage device via the memory of the second storage controller to replicate the data of the first persistent storage device, wherein the DMAing operations occur such that the data travels through the first and second host systems while bypassing one or more components of the first and second host systems. 8. The method of claim 7 , further comprising: DMAing other data from the first host system to the first storage controller; DMAing the other data from the first storage controller to the second storage controller; and DMAing the other data to the second persistent storage device via the memory of the second storage controller. 9. The method of claim 7 , wherein: the driver comprises a remote DMA (RDMA) firmware module linked to the memory of the first storage controller; and the method further comprises directing the first storage controller to DMA the data from the first persistent storage device to the memory of the first storage controller via the RDMA firmware module. 10. The method of claim 9 , wherein: the RDMA firmware module is an Infiniband firmware module or a RDMA over Converged Ethernet firmware module. 11. The method of claim 9 , wherein: the first host system comprises a file system; and the one or more components bypassed includes the file system of the first host system. 12. The method of claim 7 , wherein: the first storage controller is a Mega-Redundant Array of Independent Disks controller. 13. A non-transitory computer readable medium for replicating data in a storage system across first and second host systems, the computer readable medium comprising instructions that: link a first storage controller to a second storage controller, wherein the first storage controller is communicatively coupled to the first host system and the second storage controller is communicatively coupled to the second host system and wherein the first storage controller is communicatively coupled to a first persistent storage device of the first host system and the second storage controller is communicatively coupled to a second persistent storage device of the second host system; map a memory of the first host system to the first storage controller; map a memory of the second host system to the second storage controller; direct memory access (DMA) data from the first persistent storage device to the memory of the first storage controller via a driver of the first host system that presents a signal to the first host system to allow the first host system to access a logical block address and a desired number of data blocks of the persistent storage device of the first host system by way of the first storage controller; and DMA the data to the second persistent storage device via the memory of the second storage controller to replicate the data of the first persistent storage device, wherein the driver comprises a remote DMA (RDMA) firmware module linked to the memory of the first storage controller, wherein the computer readable medium further comprises instructions that direct the first storage controller to DMA the data from the first persistent storage device to the memory of the first storage controller via the RDMA firmware module, and wherein the DMAing operations occur such that i) the data travels through the first host system while bypassing one or more components of the first host system, and ii) the data travels through the second host system while bypassing one or more components of the second host system. 14. The computer readable medium of claim 13 , further comprising instructions that: DMA other data from the first host system to the first storage controller; DMA the other data from the first storage controller to the second storage controller

Assignees

Inventors

Classifications

  • for peripheral access to main memory, e.g. direct memory access [DMA] · CPC title

  • maintaining the standby controller/processing unit updated (initialisation or re-synchronisation thereof G06F11/1658 and subgroups) · CPC title

  • Disk arrays, e.g. RAID, JBOD · CPC title

  • in relation to data integrity, e.g. data losses, bit errors · CPC title

  • whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor · CPC title

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What does patent US9921753B2 cover?
Embodiments herein provide for redundant data storage. One storage system includes first and second host systems each comprising a memory and a persistent storage device. The storage system also includes first and second storage controllers each comprising a memory (e.g., DRAM). The memory of the first storage controller is mapped to the memory of the first host system and the memory of the sec…
Who is the assignee on this patent?
Avago Technologies General Ip
What technology area does this patent fall under?
Primary CPC classification G06F3/0611. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).