Liquid crystal display

Patent metadata

Field	Value
Publication number	US-9921423-B2
Application number	US-201514805240-A
Country	US
Kind code	B2
Filing date	Jul 21, 2015
Priority date	Oct 7, 2014
Publication date	Mar 20, 2018
Grant date	Mar 20, 2018

Abstract

A liquid crystal display according to an exemplary embodiment of the present system and method includes: a first substrate; a thin film transistor disposed on the first substrate; a passivation layer disposed on the thin film transistor and including a first portion and a second portion thicker than the first portion; a first sub-pixel electrode and a second sub-pixel electrode disposed on the passivation layer, spaced apart from each other, and positioned on one pixel region; a second substrate facing the first substrate; and a liquid crystal layer positioned between the first substrate and the second substrate, wherein the first sub-pixel electrode is disposed on the second portion of the passivation layer, and the second sub-pixel electrode is disposed on the first portion of the passivation layer.

First claim

The invention claimed is:

1. A liquid crystal display, comprising:
a first substrate;
a thin film transistor disposed on the first substrate;
a passivation layer disposed on the thin film transistor and including a first portion and a second portion thicker than the first portion;
a first sub-pixel electrode and a second sub-pixel electrode disposed on the passivation layer, not directly connected to each other, and positioned on one pixel region;
a second substrate facing the first substrate; and
a liquid crystal layer positioned between the first substrate and the second substrate,
wherein the first sub-pixel electrode is disposed on the second portion of the passivation layer, and the second sub-pixel electrode is disposed on the first portion of the passivation layer,
wherein the first sub-pixel electrode has an overall polygonal shape of a hexagon, and the second sub-pixel electrode has an overall shape in which four parallelograms are clustered.

2. The liquid crystal display of claim 1 , wherein the second portion of the passivation layer is thicker than the first portion of the passivation layer by 5000 Å to 10000 Å.

3. A liquid crystal display, comprising:
a first substrate;
a thin film transistor disposed on the first substrate;
a passivation layer disposed on the thin film transistor and including a first portion and a second portion thicker than the first portion;
a first sub-pixel electrode and a second sub-pixel electrode disposed on the passivation layer, spaced apart from each other, and positioned on one pixel region;
a second substrate facing the first substrate; and
a liquid crystal layer positioned between the first substrate and the second substrate,
wherein the first sub-pixel electrode is disposed on the second portion of the passivation layer, and the second sub-pixel electrode is disposed on the first portion of the passivation layer, and
wherein the second portion of the passivation layer has an overall polygonal shape of a hexagon, and
the first portion of the passivation layer surrounds the second portion of the passivation layer.

4. The liquid crystal display of claim 1 , wherein the first sub-pixel electrode includes a plurality of first branch electrodes, the second sub-pixel electrode includes a plurality of second branch electrodes, and the second sub-pixel electrode is positioned at a border of the pixel region so as to surround the first sub-pixel electrode.

5. The liquid crystal display of claim 4 , wherein the first sub-pixel electrode and the second sub-pixel electrode are spaced apart a distance of 3 μm to 4 μm.

6. The liquid crystal display of claim 5 , wherein the distance between the first sub-pixel electrode and the second sub-pixel electrode is 3.0 μm, and
a ratio of the voltage applied to the second sub-pixel electrode to the voltage applied to the first sub-pixel electrode is 0.9 or less.

7. The liquid crystal display of claim 5 , wherein the distance between the first sub-pixel electrode and the second sub-pixel electrode is 4.0 μm, and
a ratio of the voltage applied to the second sub-pixel electrode to the voltage applied to the first sub-pixel electrode is 0.8 or less.

8. The liquid crystal display of claim 5 , wherein the first sub-pixel electrode further includes a cross stem portion including a horizontal stem portion and a vertical stem portion, and
the plurality of first branch electrodes extends in four different directions from the cross stem portion.

9. The liquid crystal display of claim 8 , wherein the second sub-pixel electrode further includes a border stem portion positioned at a border of the pixel region, and
the plurality of second branch electrodes extends in four different directions from the border stem portion.

10. The liquid crystal display of claim 1 , further comprising a common electrode disposed on the second substrate.

Assignees

• Samsung Display Co Ltd

Inventors

• Yun Sung-Jae
• Park Heung Shik
• Kwon Oh Jeong
• Shin Ki Chul

Classifications

• G02F1/133707

  Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes · CPC title

• G02F2001/13606

  Physics · mapped topic

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• G02F2001/133357

  Physics · mapped topic

• G02F1/133371 Primary

  Cells with varying thickness of the liquid crystal layer · CPC title