Embedded package structure

Patent metadata

Field	Value
Publication number	US-9913380-B2
Application number	US-201715490178-A
Country	US
Kind code	B2
Filing date	Apr 18, 2017
Priority date	May 31, 2016
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

An embedded package structure includes an insulation substrate, a first conductive layer, a second conductive layer, an electronic component and a passive component. The insulation substrate has a first conductive via and a second conductive via. The first conductive layer is formed on a top surface of the insulation substrate and contacted with the first conductive via. The second conductive layer is formed on a bottom surface of the insulation substrate, and contacted with the second conductive via. The electronic component is embedded within the insulation substrate. Moreover, plural conducting terminals of the electronic components are electrically connected with the first conductive layer and the second conductive layer through the first conductive via and the second conductive via. The passive component is located near a first side of the electronic component and separated from the electronic component. The passive component is at least partially embedded within the insulation substrate.

First claim

What is claimed is:

1. An embedded package structure, comprising:
an insulation substrate having at least one first conductive via and at least one second conductive via;
a first conductive layer formed on a top surface of the insulation substrate, wherein the first conductive layer is in contact with the at least first conductive via;
a second conductive layer formed on a bottom surface of the insulation substrate, wherein the second conductive layer is in contact with the at least second conductive via;
an electronic component embedded within the insulation substrate, and comprising plural first conducting terminals, wherein the plural first conducting terminals are electrically connected with the first conductive layer and the second conductive layer through the at least one first conductive via and the at least one second conductive via, respectively;
a first insulation material layer formed on an outer surface of the first conductive layer and a part of the top surface of the insulation substrate;
a second insulation material layer formed on an outer surface of the second conductive layer and a part of the bottom surface of the insulation substrate;
a passive component located near a first side of the electronic component and separated from the electronic component, wherein the passive component is at least partially embedded within the insulation substrate, wherein the passive component further comprises at least one second conducting terminal, and the passive component is located beside the electronic component along a horizontal direction, wherein an outer surface of the passive component is at the same level with a top surface of the first insulation material layer;
an opening, wherein the opening is located beside the electronic component, and the opening runs through the first insulation material layer, the second insulation material layer and the insulation substrate, wherein at least a part of the passive component is accommodated within the opening, wherein the opening is larger than the passive component, so that a gap is formed between the passive component and an inner surface of the opening;
a fixing structure formed on the top surface of the first insulation material layer and the outer surface of the passive component, and filled in the gap between the passive component and the inner surface of the opening;
a third insulation material layer formed on a top surface of the fixing structure;
a magnetic element embedded within the third insulation material layer and disposed on the top surface of the fixing structure; and
a third conductive layer formed on a top surface of the third insulation material layer, wherein a part of the top surface of the third insulation material layer is exposed through the third conductive layer.

2. The embedded package structure according to claim 1 , further comprising:
a third conductive layer formed on a top surface of the first insulation material layer, wherein a part of the top surface of the first insulation material layer is exposed through the third conductive layer;
a fixing structure formed on the top surface of the first insulation material layer, an outer surface of the third conductive layer and an outer surface of the passive component, and filled in the gap between the passive component and the inner surface of the opening; and
a fourth conductive layer formed on a top surface of the fixing structure, wherein a part of the top surface of the fixing structure is exposed through the fourth conductive layer.

3. The embedded package structure according to claim 2 , wherein plural conductive channels are formed in the fixing structure, wherein the plural conductive channels are in contact with the third conductive layer and the corresponding second conducting terminal of the passive component.

4. The embedded package structure according to claim 3 , wherein the fourth conductive layer is in contact with top surfaces of the plural conductive channels.

5. The embedded package structure according to claim 4 , wherein plural third conductive vias are formed in the first insulation material layer, and the first conductive layer and the third conductive layer are electrically connected with each other through the plural third conductive vias, wherein the first conductive terminal on the top surface of the electronic component is electrically connected with the corresponding third conductive via through the corresponding first conductive via.

6. The embedded package structure according to claim 1 , wherein plural conductive channels are formed in the fixing structure, wherein the plural conductive channels are in contact with the corresponding second conducting terminal of the passive component.

7. The embedded package structure according to claim 6 , wherein plural third conductive vias are formed in the first insulation material layer, wherein the first conductive layer is electrically connected with the corresponding conductive channels through the corresponding third conductive vias.

8. The embedded package structure according to claim 7 , wherein plural fourth conductive vias are formed in the third insulation material layer, wherein the third conductive layer is electrically connected with the corresponding conductive channels through the corresponding fourth conductive vias.

9. The embedded package structure according to claim 1 , wherein the passive component is completely embedded within the insulation substrate, and the passive component comprises plural second conducting terminals.

10. The embedded package structure according to claim 9 , wherein plural third conductive vias are further formed in the insulation substrate, wherein the first conductive layer is electrically connected with the corresponding second conducting terminals through the corresponding third conductive vias.

11. The embedded package structure according to claim 10 , further comprising:
a fixing structure formed on a top surface of the first insulation material layer, wherein plural conductive channels are formed in the fixing structure;
a third insulation material layer formed on a top surface of the fixing structure;
a magnetic element embedded within the third insulation material layer and disposed on the top surface of the fixing structure; and
a third conductive layer formed on a top surface of the third insulation material layer, wherein a part of the top surface of the third insulation material layer is exposed through the third conductive layer.

12. The embedded package structure according to claim 11 , wherein the first conductive layer is electrically connected with the corresponding conductive channels through plural fourth conductive vias in the first insulation layer.

13. The embedded package structure according to claim 12 , wherein the third conductive layer is electrically connected with the corresponding conductive channels through plural fifth conductive vias in the third insulation layer.

14. The embedded package structure according to claim 13 , further comprising a resistor, wherein the resistor is located near a second side of the electronic component, and disposed on the top surface of the insulation substrate, wherein the resistor is in contact with the corresponding fourth conductive via.

15. The embedded package structure according to claim 1 , wherein the passive component is a capacitor, a resistor or an inductor.

16. An embedded package structure comprising:
a dielectric substrate having a first region and a second region adjacent to the first region;
an electronic component embedded within the first region of the dielectr

Assignees

• Delta Electronics Intl Singapore Pte Ltd

Inventors

• Lai Yiu Wai
• Chen Da Jung

Classifications

• H10W72/9413

  on encapsulations · CPC title

• H10W70/60 Primary

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W70/09

  extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs · CPC title

• H10W70/614

  the multiple chips being integrally enclosed · CPC title

• H10W72/926

  Multiple bond pads having different sizes · CPC title