Architectures and devices related to Doherty amplifiers

US9912299B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9912299-B2
Application numberUS-201615289917-A
CountryUS
Kind codeB2
Filing dateOct 10, 2016
Priority dateMay 13, 2014
Publication dateMar 6, 2018
Grant dateMar 6, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An amplifier architecture can include an input circuit for splitting a signal into first and second portions, and carrier and peaking amplification paths for receiving the first and second portions. The architecture can further include an output circuit having a balun transformer circuit with first and second coils, with the first coil between first and second ports, the second coil between third and fourth ports, the first and third ports coupled by a first capacitance, and the second and fourth ports coupled by a second capacitance. The first port can receive a first signal from the carrier amplification path, and the fourth port can receive a second signal from the peaking amplification path. The second port can provide a combination of the first signal and the second signal as an amplified signal. A termination circuit can be provided to couple the third port to a ground.

First claim

Opening claim text (preview).

What is claimed is: 1. An amplifier architecture comprising: an input circuit configured to receive a signal and split the signal into a first portion and a second portion; an amplification circuit having a carrier amplifier coupled to the input circuit to receive the first portion and a peaking amplifier coupled to the input circuit to receive the second portion, the carrier amplifier biased different than the peaking amplifier; and an output circuit coupled to the amplification circuit and including a balun transformer circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive a first signal from the carrier amplifier, the fourth port configured to receive a second signal from the peaking amplifier, the second port configured to provide a combination of the first signal and the second signal as an amplified signal, the output circuit further including a termination circuit that couples the third port to a ground. 2. The amplifier architecture of claim 1 wherein the amplification circuit is a power amplifier circuit. 3. The amplifier architecture of claim 2 wherein the termination circuit is configured to provide a reactance approximately equal in magnitude as an impedance at the second port. 4. The amplifier architecture of claim 3 wherein the termination circuit includes a capacitance such that the termination circuit has a capacitive reactance approximately equal in magnitude as the impedance at the second port. 5. The amplifier architecture of claim 3 wherein the termination circuit includes an inductance such that the termination circuit has an inductive reactance approximately equal in magnitude as the impedance at the second port. 6. The amplifier architecture of claim 1 wherein the signal includes a radio-frequency signal. 7. A method for amplifying a signal, the method comprising: receiving the signal; splitting the signal into a first portion and a second portion; routing the first portion to a carrier amplifier and the second portion to a peaking amplifier; biasing the carrier amplifier; biasing the peaking amplifier different than the carrier amplifier; and combining a first signal from the carrier amplifier and a second signal from the peaking amplifier with an output circuit including a balun transformer circuit having a first coil and a second coil, the first coil implemented between a first port and a second port, the second coil implemented between a third port and a fourth port, the first port and the third port coupled by a first capacitance, the second port and the fourth port coupled by a second capacitance, the first port configured to receive the first signal from the carrier amplifier, the fourth port configured to receive the second signal from the peaking amplifier, the second port configured to provide a combination of the first signal and the second signal as an amplified signal, the output circuit further including a termination circuit that couples the third port to a ground. 8. The method of claim 7 wherein the combining is performed such that a reactance provided by the termination circuit is approximately equal in magnitude as an impedance at the second port. 9. The method of claim 8 wherein the termination circuit includes a capacitance such that the termination circuit has a capacitive reactance approximately equal in magnitude as the impedance at the second port. 10. The method of claim 8 wherein the termination circuit includes an inductance such that the termination circuit has an inductive reactance approximately equal in magnitude as the impedance at the second port. 11. An integrated passive device comprising: a substrate; first, second, third and fourth ports implemented on the substrate; and a signal combiner circuit implemented on the substrate and including a balun transformer circuit having a first coil and a second coil, the first coil implemented between the first and second ports, the second coil implemented between the third and fourth ports, the first and third ports coupled by a first capacitance, the second and fourth ports coupled by a second capacitance, the first port configured to receive a first signal from one of a carrier amplifier and a peaking amplifier, the fourth port configured to receive a second signal from the other of the carrier amplifier and the peaking amplifier, the carrier amplifier biased different than the peaking amplifier, the second port configured to provide a combination of the first signal and the second signal as an amplified signal, the signal combiner circuit further including a termination circuit that couples the third port to a ground. 12. The integrated passive device of claim 11 wherein the substrate includes silicon or glass. 13. The integrated passive device of claim 11 further comprising an auto-transformer based impedance matching circuit. 14. The integrated passive device of claim 11 wherein the termination circuit is configured to include a reactance value approximately equal in magnitude as an impedance at the second port.

Assignees

Inventors

Classifications

  • H03F1/0288Primary

    using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

  • the output amplifying stage of an amplifier comprising two power stages · CPC title

  • A hybrid coupler being used as coupling circuit between stages of an amplifier circuit · CPC title

  • Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop · CPC title

  • Earthing means; Earth screens; Counterpoises · CPC title

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What does patent US9912299B2 cover?
An amplifier architecture can include an input circuit for splitting a signal into first and second portions, and carrier and peaking amplification paths for receiving the first and second portions. The architecture can further include an output circuit having a balun transformer circuit with first and second coils, with the first coil between first and second ports, the second coil between thi…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/0288. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 06 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).