Protection from hard commutation events at power switches

Patent metadata

Field	Value
Publication number	US-9912220-B2
Application number	US-201715621317-A
Country	US
Kind code	B2
Filing date	Jun 13, 2017
Priority date	Jan 19, 2015
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

A system is described that includes a half-bridge, a first driver, a second driver, and a controller unit. The half-bridge includes a first switch coupled to a second switch at a switching node. The first driver is configured to drive the first switch and the second driver is configured to drive the second switch. The controller unit is configured to determine whether a hard commutation event is likely to occur at the half-bridge during a future switching cycle, and responsive to determining that the hard commutation event is likely to occur during the future switching cycle, control the first driver and the second driver to activate at least one hard commutation countermeasure.

First claim

The invention claimed is:

1. A method comprising:
during a current switching cycle of first and second power switches of a half-bridge of a resonant converter, determining whether a hard commutation event will occur at the half-bridge during a future switching cycle of the first and second power switches by at least:
determining a direction of current flowing between a switching node of the half-bridge and a resonant capacitor of the resonant converter;
determining a respective operating state of each of the first and second power switches;
determining, based on the direction of the current and the respective operating states of the first and second power switches, whether the first power switch is operating in reverse operation mode by conducting on a respective body diode of the first power switch while the second switch is conducting through a forward conduction channel of the second switch; and
responsive to determining that the first power switch is operating in reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle;

responsive to determining that the hard commutation event will occur during the future switching cycle, activating at least one hard commutation countermeasure; and
responsive to determining that the hard commutation event will not occur during the future switching cycle, refraining from activating the at least one hard commutation countermeasure.

2. The method of claim 1 , wherein activating the at least one hard commutation countermeasure prevents the hard commutation event or at least protects at least one of the first and second power switches from the hard commutation event.

3. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises:
determining a respective direction of current flowing through each of the first and second power switches;
determining, based on the respective directions of the current flowing through each of the first and second power switches, whether the first power switch is operating in reverse operation mode while the second switch is conducting through a forward conduction channel of the second switch; and
responsive to determining that the first power switch is operating in reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle.

4. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises:
determining a respective voltage across each of the first and second power switches;
determining whether the first power switch is operating in reverse operation mode while the second switch is conducting through a forward conduction channel of the second switch based on the respective voltages across each of the first and second power switches; and
responsive to determining that the first power switch is operating in reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle.

5. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises:
determining a first voltage across one of the first and second power switches;
determining a second voltage across a DC link of the half-bridge;
determining whether the first power switch is operating in reverse operation mode while the second switch is conducting through a forward conduction channel of the second switch based on the first voltage and the second voltage; and
responsive to determining that the first power switch is operating in reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle.

6. The method of claim 1 , wherein the first power switch is configured to remain switched-off during the future switching cycle, and wherein activating the at least one countermeasure comprises enabling a high-ohmic output of a driver of the first power switch.

7. The method of claim 1 , wherein the second power switch is configured to switch-on during the future switching cycle, wherein activating the at least one countermeasure comprises enabling a high-ohmic output of a driver of the second power switch to slow-down the switch-on of the second power switch.

8. The method of claim 1 , wherein the second power switch is configured to switch-on during the future switching cycle, wherein activating the at least one countermeasure comprises refraining from switching-on the second power switch during the future switching cycle.

9. The method of claim 8 , wherein activating the at least one countermeasure further comprises switching-on the first power switch during the future switching cycle.

10. The method of claim 1 , wherein refraining from activating the at least one hard commutation countermeasure comprises enabling a low-ohmic output of a driver of at least one of the first and second power switches.

11. The method of claim 1 , wherein the future switching cycle is a next, subsequent switching cycle that immediately follows the current switching cycle in-time.

12. A controller unit for a power circuit, the controller unit being configured to:
during a current switching cycle of a half-bridge, determine whether a hard commutation event will occur at the half-bridge during a future switching cycle, wherein the half-bridge includes a first switch coupled to a second switch at a switching node, wherein the controller unit is configured to determine whether the hard commutation event will occur at the half-bridge during the future switching cycle based at least in part on a direction of current flowing between the switching node and a resonant capacitor, and a respective operating state of each of the first and second switches; and
responsive to determining that the hard commutation event will occur during the future switching cycle, control a first driver and a second driver to activate at least one hard commutation countermeasure, wherein the first driver drives the first switch and the second driver drives the second switch.

13. The controller unit of claim 12 , wherein the controller unit is further configured to:
receive, from a measurement unit, an indication of electrical characteristics of the half-bridge being sensed by the measurement unit; and
determine whether the hard commutation event will occur at the half-bridge during the future switching cycle based at least in part of the electrical characteristics.

14. The controller unit of claim 12 , wherein the controller unit is configured to determine whether the hard commutation event will occur at the half-bridge during the future switching cycle by at least determining whether the hard commutation event will occur during the future switching cycle.

15. The controller unit of claim 12 , wherein the controller unit is configured to determine whether the hard commutation event will occur at the half-bridge during the future switching cycle based at least in part on a respective direction of current flowing through each of the first and second switches.

16. A controller unit for a power circuit, the controller unit being configured to:
during a current switching cycle of first and second power switches of a half-br

Assignees

• Infineon Technologies Austria Ag

Inventors

• Deboy Gerald

Classifications

• A47K3/064

  specially adapted for use for children or babies {; Mounting frames therefor} · CPC title

• H02M1/083

  for the ignition at the zero crossing of the voltage or the current · CPC title

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• H03K17/08122

  in field-effect transistor switches · CPC title

• H03K17/0814

  by measures taken in the output circuit · CPC title