Interposer substrate and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-9911626-B2
Application number	US-201414514981-A
Country	US
Kind code	B2
Filing date	Oct 15, 2014
Priority date	Jul 31, 2014
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

A method of fabricating an interposer substrate provides a carrier having a first wiring layer. The first wiring layer has a plurality of first conductive pillars. A first insulating layer is formed on the carrier. The first conductive pillars are exposed from the first insulating layer. External connection pillars are formed above the first conductive pillars and electrically connected to the first conductive pillars. Then the carrier is removed. The process of fabricating the via can be bypassed in the process by forming a coreless interposer substrate on the carrier, such that the overall cost of the process can be decreased, and the process is simple. The interposer substrate is also provided.

First claim

What is claimed is:

1. An interposer substrate, comprising:
an insulating body;
at least a wiring layer formed on one surface of the insulating body;
a plurality of conductive pillars embedded in the insulating body and connected to the wiring layer; and
a plurality of external connection pillars disposed on and in direct contact with the conductive pillars, protruding from an outermost surface of the insulating body opposite to the one surface of the insulating body and being free from being embedded in the insulating body,
wherein the first conductive pillars electrically connect the external connection pillars and the wiring layer, and the external connection pillars are copper pillars.

2. The interposer substrate of claim 1 , wherein the insulating body is formed of molding compound, primer or dielectric material.

3. The interposer substrate of claim 1 , wherein the wiring layer has a surface lower than the one surface of the insulating body.

4. The interposer substrate of claim 1 , wherein an end surface of each of the first conductive pillars is flush with the outermost surface of the insulating body.

5. The interposer substrate of claim 1 , further comprising a supporting structure disposed on the one surface of the insulating body.

Assignees

• Phoenix Pioneer Technology Co Ltd

Inventors

• Chou Pao Hung

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title