Mandrel spacer patterning in multi-pitch integrated circuit manufacturing

Patent metadata

Field	Value
Publication number	US-9911606-B2
Application number	US-201615267341-A
Country	US
Kind code	B2
Filing date	Sep 16, 2016
Priority date	Apr 28, 2016
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

A method of manufacturing an integrated circuit (IC) includes receiving a design layout of the IC, wherein the design layout includes two abutting blocks, the two blocks include target patterns, and the target patterns have different pitches in the two blocks. The method further includes generating mandrel pattern candidates in spaces between adjacent target patterns, and assigning first and second colors to the mandrel pattern candidates according to their priorities. The method further includes removing the mandrel pattern candidates assigned with the second color, and outputting a mandrel pattern in computer-readable format for mask fabrication. The mandrel pattern includes the mandrel pattern candidates that are colored with the first color.

First claim

What is claimed is:

1. A method for integrated circuit (IC) manufacturing, comprising:
receiving a target IC design layout having two abutting blocks, each of the two abutting blocks having target patterns spaced according to a pattern pitch, the two abutting blocks have different pattern pitches;
filling mandrel pattern candidates in spaces between the target patterns;
coloring the mandrel pattern candidates with first and second colors, which includes:
coloring a first one of the mandrel pattern candidates with the first color; and
coloring any two adjacent mandrel pattern candidates with different colors;
removing the mandrel pattern candidates that are colored with the second color; and
outputting a mandrel pattern in computer-readable format for mask fabrication, the mandrel pattern including the mandrel pattern candidates that are colored with the first color.

2. The method of claim 1 , further comprising:
creating a cut pattern for partially removing the mandrel pattern in a photolithography process.

3. The method of claim 2 , further comprising:
forming IC features on a semiconductor substrate using the mandrel pattern and the cut pattern.

4. The method of claim 1 , further comprising:
creating a cut pattern overlapping a side of the mandrel pattern.

5. The method of claim 4 , further comprising:
forming mandrel features on a semiconductor substrate, which includes performing a photolithography process using the mandrel pattern;
forming spacer features on sidewalls of the mandrel features; and
partially removing the spacer features, which includes performing another photolithography process using the cut pattern.

6. The method of claim 1 , wherein the first one of the mandrel pattern candidates is proximate to an edge of the two abutting blocks.

7. The method of claim 6 , wherein, after the filling of the mandrel pattern candidates, each of the target patterns has a mandrel pattern candidate immediately to its right.

8. The method of claim 1 , wherein the first one of the mandrel pattern candidates is at a boundary between the two abutting blocks.

9. The method of claim 8 , wherein, after the filling of the mandrel pattern candidates, each of the target patterns has a mandrel pattern candidate immediately to its left and another mandrel pattern candidate immediately to its right.

10. The method of claim 1 , wherein one of the target patterns is shorter than another one of the target patterns.

11. The method of claim 1 , wherein each of the mandrel pattern candidates has a length equal to that of the target pattern immediately to its left.

12. The method of claim 1 , wherein a total number of the target patterns is an odd number.

13. A method for integrated circuit (IC) manufacturing, comprising:
receiving an IC design layout having abutting blocks, each of the abutting blocks having target patterns spaced according to a pattern pitch along a first direction, the target patterns having an elongated shape extending along a second direction perpendicular to the first direction;
creating mandrel pattern candidates that fill spaces between the target patterns;
coloring a first one of the mandrel pattern candidates with a first color;
coloring other ones of the mandrel pattern candidates with the first color and a second color such that any two adjacent mandrel pattern candidates are colored with different colors;
removing the mandrel pattern candidates that are colored with the second color; and
outputting a mandrel pattern in computer-readable format for mask fabrication, the mandrel pattern having the mandrel pattern candidates that are colored with the first color.

14. The method of claim 13 , wherein the first one of the mandrel pattern candidates fills a space where a boundary between two of the abutting blocks is located.

15. The method of claim 14 , wherein, after the creating of the mandrel pattern candidates, each of the target patterns has a mandrel pattern candidate immediately to its left and another mandrel pattern candidate immediately to its right.

16. The method of claim 13 , wherein the first one of the mandrel pattern candidates fills a space between two leftmost target patterns of the abutting blocks.

17. The method of claim 13 , wherein one of the target patterns is shorter than an adjacent one of the target patterns and is aligned with a middle portion of the adjacent one of the target patterns.

18. The method of claim 13 , further comprising:
creating a first cut pattern for partially removing the mandrel pattern in a photolithography process;
creating a second cut pattern overlapping a side of the mandrel pattern; and
outputting the first and second cut patterns in computer-readable format for mask fabrication.

19. A method for integrated circuit (IC) manufacturing, comprising:
receiving an IC design layout having multiple blocks, each of the blocks having target patterns extending lengthwise along a first direction and spaced according to a pattern pitch along a second direction perpendicular to the first direction, at least two of the blocks having different pattern pitches, one of the blocks being an SRAM block;
creating mandrel pattern candidates that fill spaces between the target patterns, wherein a first one of the mandrel pattern candidates fills a space where a boundary between the SRAM block and an adjacent block is located;
coloring the first one of the mandrel pattern candidates with a first color;
coloring other ones of the mandrel pattern candidates with the first color and a second color such that any two adjacent mandrel pattern candidates have different colors;
removing the mandrel pattern candidates that are colored with the second color; and
outputting a mandrel pattern in computer-readable format for mask fabrication, the mandrel pattern having the mandrel pattern candidates that are colored with the first color.

20. The method of claim 19 , wherein after the creating of the mandrel pattern candidates, each target pattern is sandwiched between two adjacent mandrel pattern candidates.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chiang Chia Ping
• Chang Ya Ting
• Cheng wen li
• Cheng Nian Fuh
• Chih Ming Hui
• Huang Wen Chun
• Liu Ru Gun
• Gau Tsai Sheng

Classifications

• H10P76/4088

  Processes for improving the resolution of the masks · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/033

  in openings in dielectrics · CPC title

• G06F30/398

  Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title