Efficient luminous display

Patent metadata

Field	Value
Publication number	US-9911386-B2
Application number	US-65522509-A
Country	US
Kind code	B2
Filing date	Dec 24, 2009
Priority date	Dec 24, 2009
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

In one embodiment a display assembly comprises a liquid crystal module, a backlight assembly comprising an array of light emitting diodes, a timing controller, and a backlight controller coupled to the timing controller. The backlight controller comprises logic to initiate a power activation cycle at the beginning of an image presentation timing cycle and terminate the power activation cycle at the termination of the image presentation timing cycle. Other embodiments may be described.

First claim

What is claimed is:

1. A display assembly, comprising:
a liquid crystal module;
a backlight assembly comprising an illumination source;
a first register to store a first duty cycle (D 1 ) of the backlight assembly during an image update cycle having a first duration in time (T 1 );
a second register to store a second duty cycle (D 2 ) of the backlight assembly during an image presentation cycle having a second duration in time (T 2 );
a timing controller; and
a backlight controller comprising logic to:
initiate a power activation cycle at the beginning of the image presentation timing cycle;
terminate the power activation cycle at the termination of the image presentation timing cycle;
determine the second duty cycle (D 2 ) as a function of T 1 , T 2 , and D 1 .

2. The display assembly of claim 1 , wherein the backlight controller is to drive the backlight assembly to a high voltage during the entire image presentation timing cycle.

3. The display assembly of claim 1 , wherein the backlight controller to hold backlight assembly to a low voltage during the entire image update timing cycle.

4. The display assembly of claim 1 , wherein the second duty cycle (D 2 ) is determined using the equation:
D 2=1−( T 1* D 1)/ T 2.

5. The display assembly of claim 1 , wherein the timing controller to determine a duration of the image presentation timing cycle.

6. An apparatus, comprising:
a first register to store a first duty cycle (D 1 ) of a backlight assembly during an image update cycle having a first duration in time (T 1 );
a second register to store a second duty cycle (D 2 ) of the backlight assembly during an image presentation cycle having a second duration in time (T 2 ); and
a timing controller; and
a backlight controller comprising logic to:
initiate a power activation cycle at the beginning of the image presentation timing cycle;
terminate the power activation cycle at the termination of the image presentation timing cycle;
determine the second duty cycle (D 2 ) as a function of T 1 , T 2 , and D 1 .

7. The apparatus of claim 6 , wherein the backlight controller drives the backlight assembly to a fully on state during the entire image presentation timing cycle.

8. The apparatus of claim 6 , wherein the backlight controller holds backlight assembly to a low voltage during an entire image refresh timing cycle.

9. The apparatus of claim 6 , wherein the second duty cycle (D 2 ) is determined using the equation:
D 2=1−( T 1* D 1)/ T 2.

10. The apparatus of claim 6 , wherein the timing controller determines a duration of the image presentation timing cycle.

11. A display assembly, comprising:
a liquid crystal module;
a backlight assembly comprising an array of light emitting diodes; and
a first register to store a first duty cycle (D 1 ) of the backlight during an image update cycle having a first duration in time (T 1 );
a second register to store a second duty cycle (D 2 ) of the backlight during an image presentation cycle having a second duration in time (T 2 );
a timing controller comprising logic to:
alternately present a right-eye image and a left-eye image; and

a backlight controller coupled to the timing controller, wherein the backlight controller comprises logic to:
initiate a power activation cycle at the beginning of the image presentation timing cycle;
terminate the power activation cycle at the termination of the image presentation timing cycle;
determine a second duty cycle (D 2 ) as a function of T 1 , T 2 , and D 1 .

12. The display assembly of claim 11 , wherein the backlight controller to drive the backlight assembly to a high voltage during the entire power activation cycle.

13. The display assembly of claim 11 , wherein the image refresh cycle progressively to write an image across lines of the display.

14. The display assembly of claim 13 , wherein the backlight controller to hold backlight assembly to a low voltage during the entire image refresh timing cycle.

15. The display assembly of claim 11 , wherein the second duty cycle (D 2 ) is determined using the equation:
D 2=1−( T 1* D 1)/ T 2.

Assignees

• Winer Paul
• Intel Corp

Inventors

• Winer Paul

Classifications

• G09G3/3406 Primary

  Control of illumination source (illumination devices structurally associated with liquid crystal cells G02F1/1336) · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2320/0261

  in the context of movement of objects on the screen or movement of the observer relative to the screen · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2320/064

  by time modulation of the brightness of the illumination source · CPC title