Spontaneous reconfiguration of data structures using balloon memory allocation

Patent metadata

Field	Value
Publication number	US-9910774-B1
Application number	US-201514985268-A
Country	US
Kind code	B1
Filing date	Dec 30, 2015
Priority date	Dec 30, 2015
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

Systems for memory management in virtual machines. A method embodiment forms a reconfigurable multi-level data structure by requesting reserved memory as well as loaned-out memory. The method configures the multi-level data structure to have a first area comprising reserved memory and having a second area comprising reconfigurable memory. The reserved memory portion of the data structure is populated with pointers that address one or more portions of the second area. During operation, the method receives a request to release some or all of the reconfigurable memory. Memory address pointers in the first portion of the multi-level data structure are modified to reflect the release of the reconfigurable memory. In a hypervisor-based virtual machine environment, the first area comprising reserved memory can be allocated via a hypervisor call. The second area comprising reconfigurable memory is allocated via a balloon memory driver call.

First claim

What is claimed is:

1. A method for managing a reconfigurable data structure, the method comprising:
configuring, at a virtual machine above a hypervisor, a first portion of a multi-level data structure to have a first area comprising reserved memory and a second area comprising reconfigurable memory, wherein the reserved memory and the reconfigurable memory are assigned to the virtual machine by the hypervisor;
managing the multi-level data structure at the virtual machine by at least populating at least a portion of the reserved memory with pointers that address one or more portions of the second area;
receiving a release request from the hypervisor to release some or all of the reconfigurable memory;
reconfiguring at least a portion of the pointers to reflect release of the some or all of the reconfigurable memory from the virtual machine; and
releasing the reconfigurable memory corresponding to the release request to the hypervisor.

2. The method of claim 1 , wherein the first area comprising reserved memory is allocated via a hypervisor call, and wherein the hypervisor will not request the reserved memory be returned and the reserved memory comprises at least a highest memory tier.

3. The method of claim 1 , wherein the second area comprising reconfigurable memory is allocated via a balloon memory driver call, wherein the hypervisor includes a balloon memory drive and the virtual machine includes a balloon memory driver.

4. The method of claim 1 , wherein at least some of the one or more portions of the second area have different sizes, and the second area corresponds to a plurality of memory cache tiers and to a plurality of different storage mediums.

5. The method of claim 1 , wherein at least one of the one or more portions of the second area comprises a set of cache entries and the set of cache entries implement a least recently used policy.

6. The method of claim 5 , further comprising responding to the release request to release some or all of the reconfigurable memory by copying at least a portion of the set of cache entries in the reconfigurable memory to another location that is also composed of reconfigurable memory.

7. The method of claim 5 , further comprising responding to the release request to release some or all of the reconfigurable memory by copying at least a portion of the set of cache entries in the reconfigurable memory to another location that is composed of solid state drive (SSD) storage.

8. The method of claim 1 , further comprising, responding to the release request within a threshold amount of time, wherein responding to the release request comprises indicating that the release request is complete or indicating that the release request corresponds to a locked memory area.

9. The method of claim 1 , further comprising waiting, after receiving the release request to release some or all of the reconfigurable memory, until any locks in the reconfigurable memory are cleared.

10. The method of claim 1 , wherein the first portion of the multi-level data structure implements a linked list, and wherein a single pointer in the linked list can be updated to remove a tier from the second area.

11. A computer program, embodied in a non-transitory computer readable medium, the non-transitory computer readable medium having stored thereon a sequence of instructions which, when stored in memory and executed by a processor causes the processor to perform a set of acts, the set of acts comprising:
configuring, at a virtual machine above a hypervisor, a first portion of a multi-level data structure to have a first area comprising reserved memory and a second area comprising reconfigurable memory, wherein the reserved memory and the reconfigurable memory are assigned to the virtual machine by the hypervisor;
managing the multi-level data structure at the virtual machine by at least populating at least a portion of the reserved memory with pointers that address one or more portions of the second area;
receiving a release request from the hypervisor to release some or all of the reconfigurable memory;
reconfiguring at least a portion of the pointers to reflect release of the some or all of the reconfigurable memory from the virtual machine; and
releasing the reconfigurable memory corresponding to the release request to the hypervisor.

12. The computer program of claim 11 , wherein the first area comprising reserved memory is allocated via a hypervisor call, and wherein the hypervisor will not request the reserved memory be returned and the reserved memory comprises at least a highest memory tier.

13. The computer program of claim 11 , wherein the second area comprising reconfigurable memory is allocated via a balloon memory driver call, wherein the hypervisor includes a balloon memory drive and the virtual machine includes a balloon memory driver.

14. The computer program of claim 11 , wherein at least some of the one or more portions of the second area have different sizes, and the second area corresponds to a plurality of memory cache tiers and to a plurality of different storage mediums.

15. The computer program of claim 11 , wherein at least one of the one or more portions of the second area comprises a set of cache entries and the set of cache entries implement a least recently used policy.

16. The computer program of claim 11 , further comprising, responding to the release request within a threshold amount of time, wherein responding to the release request comprises indicating that the release request is complete or indicating that the release request corresponds to a locked memory area.

17. The computer program of claim 11 , the set of acts further comprising waiting, after receiving the release request to release some or all of the reconfigurable memory, until any locks in the reconfigurable memory are cleared.

18. The computer program of claim 11 , wherein the first portion of the multi-level data structure implements a linked list, and wherein a single pointer in the linked list can be updated to remove a tier from the second area.

19. A system comprising:
a processor;
a memory comprising computer code to be executed by the processor, in which the computer code when executed implements:
configuring, at a virtual machine above a hypervisor, a first portion of a multi-level data structure to have a first area comprising reserved memory and a second area comprising reconfigurable memory, wherein the reserved memory and the reconfigurable memory are assigned to the virtual machine by the hypervisor;
managing the multi-level data structure at the virtual machine by at least populating at least a portion of the reserved memory with pointers that address one or more portions of the second area;
receiving a release request from the hypervisor to release some or all of the reconfigurable memory;
reconfiguring at least a portion of the pointers to reflect release of the some or all of the reconfigurable memory from the virtual machine; and
releasing the reconfigurable memory corresponding to the release request to the hypervisor.

20. The system of claim 19 , wherein the first area comprising reserved memory is allocated via a hypervisor call, and wherein the hypervisor will not request the reserved memory be returned and the reserved memory comprises at least a highest memory tier.

Assignees

• Nutanix Inc

Inventors

• Gupta Karan
• Singh Kamalneet
• Bhattacharrya Manosiz
• Mirani Rajiv

Classifications

• G06F12/128

  adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel · CPC title

• G06F9/45558

  Hypervisor-specific management and integration aspects · CPC title

• G06F12/023

  Free address space management · CPC title

• G06F2212/69

  Physics · mapped topic

• G06F12/0646 Primary

  Configuration or reconfiguration · CPC title