Arbitrary pulse alignment to reduce LED flicker

Patent metadata

Field	Value
Publication number	US-9907131-B2
Application number	US-201715615662-A
Country	US
Kind code	B2
Filing date	Jun 6, 2017
Priority date	Jul 23, 2015
Publication date	Feb 27, 2018
Grant date	Feb 27, 2018

Abstract

An arbitrary alignment is provided for a series of pulses controlling a switch that in turn controls a current in an LED. Each pulse is generated according to a target time responsive to a reference time in a corresponding cycle of a synchronization clock. Each pulse has a leading portion that precedes its target time and a trailing portion subsequent to its target time. The arbitrary alignment defines the relative size of the leading portion to the trailing portion such that these relative sizes are incrementally changed across successive ones of the pulses.

First claim

We claim:

1. A system, comprising:
a light-emitting diode (LED);
a switch configured to control a current through the LED responsive to the switch cycling on and off; and
a pulse width modulation (PWM) controller configured to generate a plurality of pulses responsive to a corresponding plurality of cycles of a synchronization clock to control the cycling of the switch, each pulse having a pulse width, wherein the PWM controller is further configured to generate each pulse responsive to a target time defined with regard to a reference time in the corresponding cycle of the synchronization clock such that the pulse has a leading portion of the pulse width that precedes its target time and such that the pulse has a trailing portion of the pulse width subsequent to its target time, and wherein the PWM controller is further configured to change the leading portion by a percentage of the pulse width across successive pulses in a first subset of the plurality of pulses.

2. The system of claim 1 , wherein the PWM controller is configured to change the leading portion so as to decrement the leading portion by the percentage of the pulse width across the successive pulses in the first subset of the plurality of pulses.

3. The system of claim 1 , wherein the PWM controller is configured to change the leading portion so as to increment the leading portion by the percentage of the pulse width across the successive pulses in the first subset of the plurality of pulses.

4. The system of claim 1 , wherein the LED comprises a string of LEDs.

5. The system of claim 1 , further comprising:
a switching power converter configured to drive a constant current into the LED while the switch is cycled on responsive to each pulse in the plurality of pulses.

6. The system of claim 5 , wherein the switching power converter comprises a buck converter.

7. The system of claim 5 , wherein the switching power converter comprises a boost converter.

8. The system of claim 5 , wherein the switching power converter comprises a flyback converter.

9. The system of claim 1 , wherein the PWM controller is configured to operate in a head alignment mode in which each pulse in a second subset of the pulses has a rising edge aligned with the pulse's target time, and wherein the PWM controller is further configured to operate in a tail alignment mode in which each pulse in a third subset of the pulses has a falling edge aligned with the pulse's target time, and wherein the PWM controller is further configured to change the leading portion by a percentage of the pulse width across successive pulses in the first subset of the plurality of pulses during a mode shift between the head alignment mode and the tail alignment mode.

10. The system of claim 1 , wherein the LED is configured to backlight a display.

11. The system of claim 1 , wherein the PWM controller is further configured so that the leading portion of each pulse for a second subset of the pulses may comprise a negative percentage of the pulse width.

12. A method, comprising:
generating a plurality of pulses responsive to a corresponding plurality of cycles of a synchronization clock, wherein each pulse is generated with regard to a target time defined by a reference time established by the corresponding cycle of the synchronization clock such that each pulse has a leading portion of the pulse width preceding its target time and a remaining trailing portion of the pulse width following its target time;
cycling a switch on and off responsive to a series of pulses to control a current through a light-emitting diode (LED); and
varying the leading portion by a percentage of the pulse width across successive pulses in a first subset of the plurality of pulses.

13. The method of claim 12 , wherein varying the leading portion comprises incrementing the leading portion by the percentage of the pulse width across the successive pulses in the first subset of the plurality of pulses.

14. The method of claim 12 , wherein varying the leading portion comprises decrementing the leading portion by the percentage of the pulse width across the successive pulses in the first subset of the plurality of pulses.

15. The method of claim 12 , wherein the reference time in each cycle of the synchronization clock comprises a rising edge of the synchronization clock.

16. The method of claim 12 , wherein the reference time in each cycle of the synchronization clock comprises a falling edge of the synchronization clock.

17. The method of claim 12 , wherein the synchronization clock has a first frequency, and wherein a pulse repetition frequency for the plurality of pulses is different from the first frequency.

18. The method of claim 12 , wherein the synchronization clock has a first frequency, and wherein a pulse repetition frequency for the plurality of pulses is the same as the first frequency.

19. The method of claim 12 , further comprising backlighting a display responsive to light generated by the LED while the switch is cycled on.

20. The method of claim 12 , wherein the LED comprises a string of LEDs.

Assignees

• Dialog Semiconductor Inc

Inventors

• Kong Lingxin
• Wang Nailong
• Han Ze

Classifications

• G09G3/32 Primary

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• H05B45/46

  having LEDs disposed in parallel lines · CPC title

• H05B45/10

  Controlling the intensity of the light · CPC title

• G09G2320/064

  by time modulation of the brightness of the illumination source · CPC title

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title