Receiver and method for detecting synchronization in wireless communication system

US9907041B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9907041-B2
Application numberUS-201514811500-A
CountryUS
Kind codeB2
Filing dateJul 28, 2015
Priority dateJan 2, 2015
Publication dateFeb 27, 2018
Grant dateFeb 27, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present disclosure provides a method and a receiver for detecting synchronization in a Time Division-Synchronous Code Division Multiple Access (TD-SCDMA) system. The receiver includes a reception unit that receives a synchronization signal including an interference signal from at least one adjacent cell; and a synchronization detector that cancels the interference signal included in the synchronization signal based on a serial interference cancellation, and detects the synchronization based on the synchronization signal, from which the interference signal is canceled.

First claim

Opening claim text (preview).

What is claimed is: 1. A receiver for detecting synchronization in a wireless communication system, the apparatus comprising: a reception unit that receives a synchronization signal including an interference signal from at least one adjacent cell; and a synchronization detector that cancels the interference signal included in the synchronization signal based on a serial interference cancellation and an estimated channel from which noise is removed, and detects the synchronization based on the synchronization signal, from which the interference signal is canceled, wherein the synchronization detector comprises: a channel estimation module that estimates a channel; a noise removal module that removes the noise from the estimated channel; and a reconstruction module that reconstructs at least one of a synchronization signal and an interference signal based on the estimated channel, from which the noise is removed. 2. The receiver as claimed in claim 1 , further comprising an interference cancellation module that cancels the reconstructed interference signal from the reconstructed synchronization signal. 3. The receiver as claimed in claim 1 , wherein the channel estimation module comprises: a fast fourier transform (FFT) operation unit that performs an FFT operation on the received synchronization signal; and at least one multiplier that multiplies the received synchronization signal by an inverse of a synchronization signal in a frequency domain. 4. The receiver as claimed in claim 1 , wherein the noise removal module comprises: at least one inverse fast fourier transform (IFFT) operation unit that performs an IFFT operation on the estimated channel; and a processing unit that, in a time domain, compares power values of signal taps of the estimated channel with a threshold and nulls to zero signal taps having power values less than the threshold. 5. The receiver as claimed in claim 1 , wherein the noise removal module comprises: at least one IFFT operation unit that performs an IFFT operation on the estimated channel; and a processing unit that, in a time domain, nulls to zero signal taps having lengths exceeding a maximum length of the channel among signal taps of the estimated channel. 6. The receiver as claimed in claim 1 , wherein the channel estimation module comprises at least one correlator that determines a correlation power of the received synchronization signal. 7. The receiver as claimed in claim 1 , wherein the noise removal module comprises a processing unit that arranges correlation power values of the received synchronization signal and determines a predetermined number of correlation power values in order of the arrangement. 8. The receiver as claimed in claim 6 , further comprising a processing unit that sets, to a maximum delay, a time period according to which the correlation power of the received synchronization signal is determined. 9. The receiver as claimed in claim 1 , wherein the synchronization signal is located in a downlink pilot time slot (DwPTS), which discriminates between cells, between a first time slot and a second time slot, and wherein the DwPTS comprises a guard period (GP) of 32 chips and a SYNC_DL of 64 chips. 10. A method for detecting synchronization by a receiver in a wireless communication system, the method comprising: receiving a synchronization signal including an interference signal from at least one adjacent cell; canceling the interference signal included in the synchronization signal based on a serial interference cancellation and an estimated channel from which noise is removed; and detecting the synchronization based on the synchronization signal, from which the interference signal is canceled, wherein canceling the interference signal included in the synchronization signal comprises: estimating a channel; removing the noise from the estimated channel; and reconstructing at least one of a synchronization signal and an interference signal based on the estimated channel, from which the noise is removed. 11. The method as claimed in claim 10 , further comprising canceling the reconstructed interference signal from the reconstructed synchronization signal. 12. The method as claimed in claim 10 , wherein estimating the channel comprises: performing a fast fourier transform (FFT) operation on the received synchronization signal; and multiplying the received synchronization signal by an inverse of a synchronization signal in a frequency domain. 13. The method as claimed in claim 10 , wherein removing the noise from the estimated channel comprises: performing an inverse fast fourier transform (IFFT) operation on the estimated channel; comparing power values of signal taps of the estimated channel with a threshold in a time domain; and nulling to zero signal taps having power values less than the threshold. 14. The method as claimed in claim 10 , wherein removing the noise from the estimated channel comprises: performing an IFFT on the estimated channel; and nulling to zero signal taps having lengths exceeding a maximum length of the channel among signal taps of the estimated channel, in a time domain. 15. The method as claimed in claim 10 , wherein estimating the channel comprises determining a correlation power of the received synchronization signal. 16. The method as claimed in claim 10 , wherein removing the noise from the estimated channel comprises: arranging correlation power values of the received synchronization signal; and determining a predetermined number of correlation power values in order of the arrangement. 17. The method as claimed in claim 15 , comprising setting, to a maximum delay, a time period according to which the correlation power of the received synchronization signal is determined. 18. A receiver for detecting synchronization in a wireless communication system, the receiver comprising: a chipset configured to: cancel, based on a serial interference cancellation and an estimated channel from which noise is removed, an interference signal included in a synchronization signal received from at least one adjacent cell; and detect the synchronization based on the synchronization signal, from which the interference signal is canceled, wherein canceling the interference signal included in the synchronization signal comprises: estimating a channel; removing the noise from the estimated channel; and reconstructing at least one of a synchronization signal and an interference signal based on the estimated channel, from which the noise is removed.

Assignees

Inventors

Classifications

  • H04B1/7087Primary

    Carrier synchronisation aspects · CPC title

  • Synchronisation aspects · CPC title

  • Hybrid techniques using combinations of two or more spread spectrum techniques · CPC title

  • using fast Fourier transform · CPC title

  • Channel estimation · CPC title

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What does patent US9907041B2 cover?
The present disclosure provides a method and a receiver for detecting synchronization in a Time Division-Synchronous Code Division Multiple Access (TD-SCDMA) system. The receiver includes a reception unit that receives a synchronization signal including an interference signal from at least one adjacent cell; and a synchronization detector that cancels the interference signal included in the syn…
Who is the assignee on this patent?
Park Jeong Soon, Park Hwan Min, Kim Sang Woo, and 4 more
What technology area does this patent fall under?
Primary CPC classification H04B1/7087. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).