Array substrate and method for making same

US9905697B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9905697-B2
Application numberUS-201615297817-A
CountryUS
Kind codeB2
Filing dateOct 19, 2016
Priority dateDec 16, 2015
Publication dateFeb 27, 2018
Grant dateFeb 27, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A high-performance TFT substrate for a flat panel display includes a substrate, a first conductive layer on the substrate, a semiconductor layer positioned on the first conductive layer, and a second conductive layer positioned on the semiconductor layer. The first conductive layer defines a gate electrode. The second conductive layer defines a source electrode and a drain electrode spaced apart from the source electrode. The second conductive layer includes a first layer on the semiconductor layer and a second layer positioned on the first layer. The first layer can be made of metal oxide. The second layer can be made of aluminum or aluminum alloy.

First claim

Opening claim text (preview).

What is claimed is: 1. A TFT substrate comprising: a substrate; a semiconductor layer formed on the substrate, the semiconductor layer having a top surface and a bottom surface opposite to and facing away from the top surface; a first conductive layer formed on the bottom surface of the semiconductor layer, the first conductive layer defining a gate electrode; and a second conductive layer formed on the top surface of the semiconductor layer opposite to the first conductive layer, the second conductive layer defining a source electrode and a drain electrode separated from the source electrode; wherein the second conductive layer comprises a first layer positioned on the semiconductor layer and a second layer positioned on the first layer; the first layer is made of metal oxide; and the second layer is made of aluminum or aluminum alloy; the first layer functions as an ohmic contact layer between the semiconductor layer and the second layer; wherein the second conductive layer further comprises a third layer positioned on the second layer, the third layer is made of metal oxide; wherein a groove is defined between the source electrode and the drain electrode; the groove passes through the first layer, the second layer, and the third layer; and wherein the size of the groove gradually decreases along a direction from the third layer to the first layer; wherein both the third layer and the first layer are made of metal oxides containing same elements; wherein both the third layer and the first layer are made of a same metal oxide containing zinc; and the third layer has an atomic percentage of zinc larger than that of the first layer. 2. A method for making a TFT substrate comprising: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate and covering the gate electrode; forming a semiconductor layer on the gate insulating layer; forming a first layer on the semiconductor layer, the first layer being made of metal oxide; forming a second layer on the first layer, the second layer being made of aluminum or aluminum alloy; forming a third layer on the second layer, the third layer being made of metal oxide; etching the first layer, the second layer, and the third layer to form a source electrode and a drain electrode spaced apart from the source electrode; wherein the first layer functions as an ohmic contact layer between the semiconductor layer and the second layer; wherein both the third layer and the first layer are made of a same metal oxide containing zinc; and the third layer has an atomic percentage of zinc larger than that of the first layer.

Assignees

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Classifications

  • of electrodes ohmically coupled to a semiconductor · CPC title

  • Chemical treatments · CPC title

  • Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

  • Dry etching; Plasma etching; Reactive-ion etching · CPC title

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

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What does patent US9905697B2 cover?
A high-performance TFT substrate for a flat panel display includes a substrate, a first conductive layer on the substrate, a semiconductor layer positioned on the first conductive layer, and a second conductive layer positioned on the semiconductor layer. The first conductive layer defines a gate electrode. The second conductive layer defines a source electrode and a drain electrode spaced apar…
Who is the assignee on this patent?
Hon Hai Prec Ind Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L29/78618. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).