Semiconductor device

Patent metadata

Field	Value
Publication number	US-9905557-B2
Application number	US-201414445515-A
Country	US
Kind code	B2
Filing date	Jul 29, 2014
Priority date	Mar 4, 2011
Publication date	Feb 27, 2018
Grant date	Feb 27, 2018

Abstract

A connection electrode for connecting a transistor including a semiconductor material other than an oxide semiconductor to a transistor including an oxide semiconductor material is smaller than an electrode of the transistor including a semiconductor material other than an oxide semiconductor that is connected to the connection electrode.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first transistor;
an insulating layer over the first transistor;
a second transistor over the insulating layer; and
a connection electrode electrically connected to a gate electrode of the first transistor,
wherein a channel formation region of the first transistor comprises silicon,
wherein the second transistor comprises a semiconductor layer including a channel formation region of the second transistor,
wherein the channel formation region of the second transistor comprises an oxide semiconductor,
wherein one of a source electrode and a drain electrode of the second transistor overlaps with the channel formation region of the first transistor,
wherein the one of the source electrode and the drain electrode of the second transistor is electrically connected to the connection electrode with the semiconductor layer of the second transistor interposed therebetween, and
wherein, in a channel width direction, a length of the connection electrode is smaller than a length of the gate electrode of the first transistor.

2. The semiconductor device according to claim 1 , wherein the source electrode and the drain electrode of the second transistor are over the channel formation region of the second transistor.

3. The semiconductor device according to claim 1 ,
wherein the insulating layer comprises a trench, and
wherein a layer comprising the channel formation region of the second transistor is provided in contact with a bottom surface and an inner wall surface of the trench.

4. The semiconductor device according to claim 1 , wherein the insulating layer contains oxygen which is supplied to a layer comprising the channel formation region of the second transistor.

5. The semiconductor device according to claim 1 ,
wherein the insulating layer comprises a first insulating film and a second insulating film over the first insulating film, and
wherein a proportion of oxygen in the second insulating film is higher than a proportion of oxygen in the first insulating film.

6. The semiconductor device according to claim 1 , wherein the channel formation region of the first transistor further comprises germanium.

7. The semiconductor device according to claim 1 , wherein the oxide semiconductor comprises indium, gallium, and zinc.

8. The semiconductor device according to claim 1 , wherein the oxide semiconductor comprises indium, tin, and zinc.

9. The semiconductor device according to claim 1 , wherein a layer comprising the channel formation region of the second transistor comprises a crystalline portion having c-axis alignment.

10. The semiconductor device according to claim 1 , further comprising a capacitor,
wherein an electrode of the capacitor is electrically connected to the gate electrode of the first transistor and the one of the source electrode and the drain electrode of the second transistor.

11. A semiconductor device comprising:
a first transistor;
an insulating layer over the first transistor;
a second transistor over the insulating layer; and
a connection electrode electrically connected to a gate electrode of the first transistor,
wherein a channel formation region of the first transistor comprises silicon,
wherein the second transistor comprises a semiconductor layer including a channel formation region of the second transistor,
wherein the channel formation region of the second transistor comprises an oxide semiconductor,
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to the connection electrode with the semiconductor layer of the second transistor interposed therebetween, and
wherein, in a channel width direction, a length of the connection electrode is smaller than a length of the gate electrode of the first transistor.

12. The semiconductor device according to claim 11 , wherein the source electrode and the drain electrode of the second transistor are over the channel formation region of the second transistor.

13. The semiconductor device according to claim 11 ,
wherein the insulating layer comprises a trench, and
wherein a layer comprising the channel formation region of the second transistor is provided in contact with a bottom surface and an inner wall surface of the trench.

14. The semiconductor device according to claim 11 , wherein the insulating layer contains oxygen which is supplied to a layer comprising the channel formation region of the second transistor.

15. The semiconductor device according to claim 11 ,
wherein the insulating layer comprises a first insulating film and a second insulating film over the first insulating film, and
wherein a proportion of oxygen in the second insulating film is higher than a proportion of oxygen in the first insulating film.

16. The semiconductor device according to claim 11 , wherein the channel formation region of the first transistor further comprises germanium.

17. The semiconductor device according to claim 11 , wherein the oxide semiconductor comprises indium, gallium, and zinc.

18. The semiconductor device according to claim 11 , wherein the oxide semiconductor comprises indium, tin, and zinc.

19. The semiconductor device according to claim 11 , wherein a layer comprising the channel formation region of the second transistor comprises a crystalline portion having c-axis alignment.

20. The semiconductor device according to claim 11 , further comprising a capacitor,
wherein an electrode of the capacitor is electrically connected to the gate electrode of the first transistor and the one of the source electrode and the drain electrode of the second transistor.

21. A semiconductor device comprising:
a first transistor;
an insulating layer over the first transistor, the insulating layer comprising a trench;
a second transistor over the insulating layer; and
a connection electrode electrically connected to a gate electrode of the first transistor,
wherein a first channel formation region of the first transistor comprises a first semiconductor material,
wherein a second channel formation region of the second transistor comprises a second semiconductor material different from the first semiconductor material,
wherein the trench is filled with a gate electrode of the second transistor, and
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to the connection electrode with a semiconductor layer of the second transistor interposed therebetween.

22. The semiconductor device according to claim 21 , wherein, in a channel width direction of the first transistor, a length of the connection electrode is smaller than a length of the gate electrode of the first transistor.

23. The semiconductor device according to claim 21 ,
wherein the first semiconductor material is silicon, and
wherein the second semiconductor material is an oxide semiconductor.

24. The semiconductor device according to claim 21 , wherein the source electrode and the drain electrode of the second transistor are over the second channel formation region.

25. The semiconductor device according to claim 21 , wherein the semiconductor layer of the second transistor is in contact with a bottom surface and an inner wall surface of the trench.

26. The semiconductor device according to claim 21 , wherein the insulating layer contains oxygen which is supplied to the

Assignees

• Semiconductor Energy Lab

Inventors

• Saito Toshihiko
• Kato Kiyoshi
• Isobe Atsuo

Classifications

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H01L29/78696

  Electricity · mapped topic

• H01L27/1225

  Electricity · mapped topic

• H01L27/1156

  Electricity · mapped topic