Control device and computer program product

Patent metadata

Field	Value
Publication number	US-9904350-B2
Application number	US-201314101597-A
Country	US
Kind code	B2
Filing date	Dec 10, 2013
Priority date	Feb 28, 2013
Publication date	Feb 27, 2018
Grant date	Feb 27, 2018

Abstract

A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.

First claim

What is claimed is:

1. A control device comprising:
a processor setting unit configured to, in response to a resumption request for resuming an information processing system from hibernation, the information processing system including a plurality of processors, the plurality of processors being not supplied with power during the hibernation, each processor being directly connected to one or more memories, and a first processor of the plurality of processors being directly connected to a memory storing resumption data for resuming the information processing system,
identify the first processor directly connected to the memory storing the resumption data for resuming the information processing system, and
activate the first processor;
a resumption data reading unit configured to read the resumption data from the memory that stores the resumption data; and
a resumption processing unit configured to resume the information processing system including a second processor of the plurality of processors by using the read resumption data.

2. A control device comprising:
a processor setting unit configured to, in response to a resumption request for resuming an information processing system from hibernation, the information processing system including two or more processors, the two or more processors being not supplied with power during the hibernation, each processor being directly connected to one or more memories, and only a first processor of the two or more processors being directly connected to a memory storing resumption data for resuming the information processing system and a task that is executed by the information processing system,
identify the first processor directly connected to the memory storing the resumption data for resuming the information processing system and the task that is executed by the information processing system and
activate the first processor;
a resumption data reading unit configured to read the resumption data from the memory that stores the resumption data; and
a resumption processing unit configured to resume the information processing system including a second processor of the two or more processors and the task by using the read resumption data.

3. The device according to claim 2 , further comprising a destination determining unit configured to determine a memory for storing the resumption data for resuming the information processing system and the task.

4. The device according to claim 3 , wherein the destination determining unit is configured to determine the memory for storing the resumption data so that a number of processors necessary for resuming the information processing system are minimum.

5. The device according to claim 3 , wherein the destination determining unit is configured to determine the memory for storing the resumption data so that a nonvolatile memory is used as the memory as far as possible.

6. The device according to claim 3 , wherein the destination determining unit is configured to determine a memory connected to a processor to which more nonvolatile memories are connected as the memory for storing the resumption data.

7. The device according to claim 3 , further comprising a memory setting unit configured to set a memory whose type is volatile among the memories determined by the destination determining unit to a self-refresh mode and to suspend power supply to the other memories.

8. A control device comprising:
a destination determining unit configured to determine a memory for storing resumption data for resuming an information processing system and a task executed by the information processing system, in response to a hibernation request for hibernating the information processing system, the information processing system including two or more processors each directly connected to one or more memories, the two or more processors being not supplied with power during hibernation, and only a first processor of the two or more processors being directly connected to the memory for storing the resumption data;
a resumption data writing unit configured to store the resumption data into the determined memory;
a processor setting unit configured to identify the first processor to which the memory that stores the resumption data is directly connected and to activate the first processor in response to a restart request for resuming the information processing system from hibernation;
a resumption data reading unit configured to read the resumption data from the memory that stores the resumption data; and
a resumption processing unit configured to resume the information processing system including a second processor of the two or more processors and the task by using the read resumption data.

9. The device according to claim 8 , wherein the destination determining unit is configured to determine the memory for storing the resumption data so that a number of processors necessary for resuming the information processing system are minimum.

10. The device according to claim 8 , wherein the destination determining unit is configured to determine the memory for storing the resumption data so that a nonvolatile memory is used as the memory as far as possible.

11. The device according to claim 8 , wherein the destination determining unit is configured to determine a memory connected to a processor to which more nonvolatile memories are connected as the memory for storing the resumption data.

12. The device according to claim 8 , further comprising a memory setting unit configured to set a memory whose type is volatile among the memories determined by the destination determining unit to a self-refresh mode and to suspend power supply to the other memories.

13. A control device comprising:
a destination determining unit configured to determine a memory for storing system resumption data for resuming an information processing system and to determine a memory for storing task resumption data for resuming a task that is executed by the information processing system, in response to a cause of hibernation of the information processing system, the information processing system including two or more processors, the two or more processors being not supplied with power during the hibernation, each directly connected to one or more memories, and only a first processor of the two or more processors being directly connected to the memory for storing the system resumption data;
a resumption data writing unit configured to write the system resumption data into the memory for storing the system resumption data and to write the task resumption data into the memory for storing the task resumption data;
a system processor setting unit configured to activate the first processor directly connected to the memory that stores the system resumption data for resuming the information processing system including a second processor of the two or more processors when a cause of resumption of the information processing system from hibernation occurs;
a system resumption data reading unit configured to read the system resumption data from the memory that stores the system resumption data determined by the destination determining unit;
a system resumption processing unit configured to resume the information processing system by using the system resumption data read by the system resumption data reading unit;
a task processor setting unit configured to identify the first processor directly connected to the memory that stores task resumption data for resuming a task determined by the destination determining unit after the information processing system is resumed by the system resumption processing unit, and to activate the first processor;
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Assignees

• Toshiba Memory Corp

Inventors

• Haruki Hiroyoshi
• Tarui Masaya
• Fujisaki Koichi
• Kimura Tetsuro
• Kanai Tatsunori
• Segawa Junichi
• Shirai Satoshi
• Shirota Yusuke
• Shibata Akihiro
• Yoshimura Shiyo
• Toyama Haruhiko

Classifications

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• Y02B60/32

  Cross-Sectional Technologies · mapped topic

• Y02B60/1282

  Cross-Sectional Technologies · mapped topic

• G06F1/329 Primary

  by task scheduling · CPC title

• G06F1/3228

  Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands · CPC title