Display control unit and method for generating a video signal

Patent metadata

Field	Value
Publication number	US-9900548-B2
Application number	US-201214421894-A
Country	US
Kind code	B2
Filing date	Aug 24, 2012
Priority date	Aug 24, 2012
Publication date	Feb 20, 2018
Grant date	Feb 20, 2018

Abstract

A display control unit is connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display. The display control unit may include a first memory unit arranged to buffer a set of image descriptors; a second memory unit connected between said first memory unit and said display; an update unit connected to said first memory unit and arranged to update said image descriptors in said first memory unit and to generate a proceed signal only when said set of image descriptors in said first memory unit is up to date; a copy unit arranged to copy said image descriptors from said first memory unit to said second memory unit in response to said proceed signal; and a video unit arranged to generate said video signal on the basis of said image descriptors in said second memory unit.

First claim

The invention claimed is:

1. A display controller configured to be connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display, said display controller comprising:
a first memory arranged to buffer a set of image descriptors;
a second memory configured to be connected between said first memory and said display;
an updater connected to said first memory, the updater to update said image descriptors in said first memory, and to generate a proceed signal only after the update of said set of image descriptors in said first memory is completed, and to transmit the proceed signal after the proceed signal is generated, wherein the proceed signal indicates that the image descriptors in the first memory are consistent and that the updated set of image descriptors is to be copied from the first memory unit to the second memory unit;
a copier arranged to receive the transmitted proceed signal, and to copy said image descriptors from said first memory to said second memory unit in response to said proceed signal being received; and
a video generator arranged to generate said video signal on the basis of said image descriptors in said second memory.

2. The display controller of claim 1 , wherein said first memory is a register.

3. The display controller of claim 1 , wherein said second memory is a static random access memory.

4. The display controller of claim 1 , wherein said updater is arranged to update said image descriptors only when said copier has terminated copying said image descriptors to second register.

5. The display controller of claim 1 , wherein said updater is arranged to update said image descriptors in response to said copier having terminated copying said image descriptors to second register.

6. The display controller of claim 1 , wherein said video generator is arranged to receive an image stream and to generate said video signal on the basis of said image descriptors in said second memory and said image stream.

7. The display controller of claim 1 , wherein said image descriptors are arranged to describe several images to be displayed simultaneously on said display.

8. The display controller of claim 1 , wherein said updater and said copier each comprise a dedicated integrated circuit.

9. A method for generating a video signal representing a sequence of video frames to be displayed consecutively on a display, comprising:
updating a set of image descriptors in a first memory unit;
transmitting a proceed signal only in response to the updating of the set of image descriptors in the first memory being completed, wherein the proceed signal indicates that the image descriptors in the first memory are consistent and that the updated set of image descriptors is to be copied from the first memory unit to a second memory unit;
receiving, at a copier, the transmitted proceed signal;
copying said image descriptors from said first memory unit to the second memory unit in response to the proceed signal being received; and
generating said video signal on the basis of said image descriptors in said second memory unit.

10. The method of claim 9 , wherein said updating said image descriptors in said first memory starts in a first frame period and extends into a next frame period.

11. The method of claim 9 , further comprising: receiving an image stream and generating said video signal on the basis of said image descriptors in said second memory unit and said image stream.

12. The method of claim 9 , wherein said image descriptors are arranged to describe several images to be displayed simultaneously on said display.

13. The method of claim 9 , wherein the second memory is a static random access memory.

14. The method of claim 9 , wherein the first memory is a register.

15. A method for generating a video signal representing a sequence of video frames to be displayed consecutively on a display, comprising:
updating a set of image descriptors in a first memory;
transmitting a proceed signal only in response to the updating of the set of image descriptors in the first memory being completed, wherein the proceed signal indicates that the image descriptors in the first memory are consistent and that the updated set of image descriptors is to be copied from the first memory unit to a second memory unit;
receiving, at a copier, the transmitted proceed signal;
copying the image descriptors from the first memory to the second memory in response to the proceed signal being received and in response to a beginning of a new frame after the proceed signal is provided; and
generating the video signal on the basis of the image descriptors in the second memory unit.

16. The method of claim 15 , wherein the first memory is a register.

17. The method of claim 15 , wherein the second memory is a static random access memory.

18. The method of claim 15 , further comprising:
updating the image descriptors in response to a copying of the image descriptors to a second register being terminated.

19. The method of claim 15 , further comprising:
receiving an image stream; and
generating the video signal on the basis of the image descriptors in the second memory and the image stream.

20. The method of claim 15 , wherein the image descriptors are arranged to describe several images to be displayed simultaneously on the display.

Assignees

• Staudenmaier Michael
• Bajaj Kshitij
• Kumar Mehul
• Mittal Sarthak
• Nxp Usa Inc

Inventors

• Staudenmaier Michael
• Bajaj Kshitij
• Kumar Mehul
• Mittal Sarthak

Classifications

• G09G2320/103

  Detection of image changes, e.g. determination of an index representative of the image change · CPC title

• H04N5/04

  Synchronising (for television systems using pulse code modulation H04N7/56) · CPC title

• G09G2360/10

  Display system comprising arrangements, such as a coprocessor, specific for motion video images · CPC title

• H04N5/265

  Mixing · CPC title

• G06T1/60

  Memory management · CPC title