Engineered ferroelectric gate devices

Patent metadata

Field	Value
Publication number	US-9899516-B2
Application number	US-201615281406-A
Country	US
Kind code	B2
Filing date	Sep 30, 2016
Priority date	Oct 1, 2015
Publication date	Feb 20, 2018
Grant date	Feb 20, 2018

Abstract

Coupling of switchable ferroelectric polarization with the carrier transport in an adjacent semiconductor enables a robust, non-volatile manipulation of the conductance in a host of low-dimensional systems, including the two-dimensional electron liquid that forms at the LaAlO 3 —SrTiO 3 interface. However, the strength of the gate-channel coupling is relatively weak, limited in part by the electrostatic potential difference across a ferroelectric gate. Compositionally grading of PbZr 1-x Ti x O 3 ferroelectric gates enables a more than twenty-five-fold increase in the LAO/STO channel conductance on/off ratios. Incorporation of polarization gradients in ferroelectric gates can enable significantly enhanced performance of ferroelectric non-volatile memories.

First claim

What is claimed is:

1. A ferroelectric gate device for a field effect transistor comprising a compositionally graded ferroelectric film including a ferroelectric material having a formula of:
A (1-y) A′ y B (1-x) B′ x O 3 ,

wherein A and A′ each represent an element independently selected from lanthanides, alkaline earth metals, and alkali metals, B and B′ each represent an independently selected transition metal, x is in the range of from 0 to 1, and y is in the range of from 0 to 1, and
the ferroelectric material has a composition gradient along a thickness of the ferroelectric film with x decreasing from one side to another side of the ferroelectric film.

2. The ferroelectric gate device of claim 1 , wherein the composition gradient is along the entire thickness of the ferroelectric film.

3. The ferroelectric gate device of claim 1 , wherein the field effect transistor has a channel and the gradient of the ferroelectric material has x decreasing from a side distal to the channel to a side proximal to the channel.

4. The ferroelectric gate device of claim 1 , wherein x is in a range of from about 0.1 to about 0.9.

5. The ferroelectric gate device of claim 1 , wherein x is in a range of from about 0.2 to about 0.8.

6. The ferroelectric gate device of claim 1 , wherein x is in a range of from about 0.3 to about 0.7.

7. The ferroelectric gate device of claim 1 , wherein y is about 0.

8. The ferroelectric gate device of claim 1 , wherein the ferroelectric material is selected from PbZr 1-x Ti x O 3 and Ba x Sr (1-x) TiO 3 .

9. The ferroelectric gate device of claim 1 , wherein the transistor includes a channel that comprises a material selected from C, Si, Ge, SiC, SiGe, AlSb, AlAs, MN, AlP, BN, BP, BaS, GaSb, GaAs, GaN, GaP, InSb, InAs, InN, InP, AlGaAs, Al x Ga 1-x ,As or In x Ga 1-x As where x is in the range of from 0 to 1, InGaAs, InGaP, AlInAs, AlInSb, GaAsN, GaAsP, AlGaN, AlGaP, InGaN, InAsSb, InGaSb, AlGaInP, InAlGaP, InGaAlP, AlInGaP, AlGaAsP, InGaAsP, AlInAsP, AlGaAsN, InGaAsN, InAlAsN, GaAsSbN, GaInNAsSb, GaInAsSbP, CdSe, CdS, CdTe, ZnO, ZnSe, ZnS, ZnTe, CdZnTe, CZT, HgCdTe, HgZnTe, HgZnSe, CuCl, PbSe, PbS, PbTe, SnS, SnTe, PbSnTe, Tl 2 SnTe 5 , Tl 2 GeTe 5 , Bi 2 Te 3 , Cd 3 P 2 , Cd 3 As 2 , Cd 3 Sb 2 , Zn 3 P 2 , Zn 3 As 2 , Zn 3 Sb 2 , PbT 2 , MoS 2 , GaSe, SnS, Bi 2 S 3 , CIGS, PtSi, BiI 3 , HgI 2 , TlBr, TiO 2 , Cu 2 O, CuO, UO 2 , UO 3 , graphene, carbon nanotube, semiconductor nanowire.

10. The ferroelectric gate device of claim 9 , wherein the channel comprises a material selected from Si, SiGe, GaAs, GaN, graphene, carbon nanotube, semiconductor nanowire, ZnO, and MoS 2 .

11. The ferroelectric gate device of claim 1 , wherein the transistor includes a channel that comprises an LaAlO 3 —SrTiO 3 interface.

12. The ferroelectric gate device of claim 1 , wherein the ferroelectric film enables at least about a 5-fold increase in a channel conductance on/off ratio of the transistor in comparison with a ferroelectric film of the same thickness but without a composition gradient.

13. The ferroelectric gate device of claim 1 , wherein the ferroelectric film enables at least about a 10-fold increase in channel conductance on/off ratio of the transistor in comparison with a ferroelectric film of the same thickness but without a composition gradient.

14. The ferroelectric gate device of claim 1 , wherein the ferroelectric film enables at least about a 15-fold increase in channel conductance on/off ratio of the transistor in comparison with a ferroelectric film of the same thickness but without a composition gradient.

15. The ferroelectric gate device of claim 1 , wherein the ferroelectric film enables at least about a 25-fold increase in channel conductance on/off ratio of the transistor in comparison with a ferroelectric film of the same thickness but without a composition gradient.

16. The ferroelectric gate device of claim 1 , wherein the ferroelectric film has a thickness of from about 30 nm to about 150 nm.

17. The ferroelectric gate device of claim 1 , wherein the ferroelectric film has a thickness of from about 50 nm to about 150 nm.

18. The ferroelectric gate device of claim 1 , wherein the ferroelectric film has a thickness of from about 50 nm to about 100 nm.

19. The ferroelectric gate device of claim 1 , wherein the ferroelectric film has a thickness of from about 80 nm to about 100 nm.

20. The ferroelectric gate device of claim 3 , wherein the channel is selected from two-dimensional, one-dimensional and one-dimensional like channels.

Assignees

• Gu Zongquan
• Islam Mohammad Anwarul
• Spanier Jonathan Eli
• Univ Drexel

Inventors

• Gu Zongquan
• Islam Mohammad Anwarul
• Spanier Jonathan Eli

Classifications

• H01L29/78391 Primary

  Electricity · mapped topic

• H01L29/775

  Electricity · mapped topic

• H01L29/778

  Electricity · mapped topic

• H01L29/4966

  Electricity · mapped topic

• H01L27/11585

  Electricity · mapped topic