Aggregate baseboard management controller (BMC) controller

US9898435B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9898435-B2
Application numberUS-201414566468-A
CountryUS
Kind codeB2
Filing dateDec 10, 2014
Priority dateDec 10, 2014
Publication dateFeb 20, 2018
Grant dateFeb 20, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Apparatuses, methods and storage media associated with the exchange of messages between a hybrid switch and one or more baseboard management controllers (BMCs) are described herein. Specifically, an aggregate BMC controller (ABC) may be communicatively coupled with both the hybrid switch and the BMCs and configured to facilitate the exchange of messages between the hybrid switch and the one or more BMCs. Other embodiments may be described and/or claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. A rack system comprising: a hybrid switch that includes a plurality of networking ports and a plurality of peripheral component interconnect express (PCIe) end points (PEPs); a plurality of baseboard management controllers (BMCs) in respective blades of a rack scale server; and an aggregate BMC controller (ABC) communicatively coupled with the hybrid switch, via one of the plurality of networking ports of the hybrid switch, and with the plurality of BMCs, via a plurality of input/output (I/O) buses, to facilitate message exchanges between the hybrid switch and the BMCs: wherein the one of the plurality of networking ports is an Ethernet port, and the ABC is configured to transmit or receive data with the hybrid switch over an Ethernet communication link using an Ethernet protocol. 2. The rack system of claim 1 , wherein an I/O bus in the plurality of I/O buses is an I/O bus that includes fewer than 8 pins. 3. The rack system of claim 2 , wherein the I/O bus is a Low Pin Count (LPC) bus, and the ABC is configured to transmit or receive data over the LPC bus using an LPC protocol. 4. The rack system of claim 2 , wherein the input/output bus is a system management bus (SMBus) or an inter-integrated circuit (I2C) bus. 5. The rack system of claim 1 , wherein a BMC of the plurality of BMCs is to monitor a physical process of a respective blade of the rack system. 6. The rack system of claim 1 , wherein the data is an Ethernet packet. 7. The rack system of claim 1 , wherein the respective blades are respective blade servers of the rack system. 8. The rack system of claim 1 , wherein the ABC is a control plane processor (CPP). 9. An aggregate baseboard management controller (BMC) controller (ABC) comprising: an Ethernet networking interface to couple the ABC with a hybrid switch, via an Ethernet networking port of the hybrid switch; a plurality of input/output (I/O) bus interfaces to couple the ABC with a plurality of BMCs, via a plurality of I/O buses; and conversion logic to convert messages exchanged between the hybrid switch and the BMCs. 10. The ABC of claim 9 , wherein the I/O bus interfaces are I/O bus interfaces configured to couple with respective I/O buses that include fewer than 8 pins. 11. The ABC of claim 9 , wherein respective I/O bus interfaces are to couple with respective Low Pin Count (LPC) buses, system management buses (SMBuses) or inter-integrated circuit (I2C) buses. 12. The ABC of claim 9 , wherein the messages include an Ethernet packet. 13. The ABC of claim 9 , wherein the apparatus is a control plane processor (CPP). 14. A method comprising: receiving, by an aggregate baseboard management controller (BMC) controller (ABC), first networking messages from a hybrid switch via an Ethernet networking link coupling an Ethernet port of the hybrid switch and the ABC; converting the first networking messages, by the ABC, to first input/output (I/O) bus messages; selectively routing, by the ABC to a plurality of BMCs, the first I/O bus messages via a plurality of I/O buses coupling the ABC and the BMCs; receiving second I/O bus messages, by the ABC, from the BMCs, via the I/O buses; converting the second I/O bus messages, by the ABC, to second networking messages; and selectively routing the second networking messages to the hybrid switch via the Ethernet networking link. 15. The method of claim 14 , wherein selectively routing the first I/O bus messages via an I/O bus comprises selectively routing the first I/O bus messages via a Low Pin Count (LPC) bus that includes fewer than 8 pins. 16. The method of claim 14 , wherein receiving the second I/O bus messages via the I/O buses comprises receiving the second I/O bus messages via a Low Pin Count (LPC) bus that includes fewer than 8 pins. 17. The method of claim 14 , wherein receiving, by the ABC, the first networking messages comprises receiving, by a control plane processor (CPP), the first networking messages. 18. Non-transitory computer-readable media comprising instructions to cause an aggregate baseboard management controller (BMC) controller (ABC), upon execution of the instructions by the ABC, to: receive first networking messages from a hybrid switch via an Ethernet networking link coupling an Ethernet port of the hybrid switch and the ABC; convert the first networking messages to first input/output (I/O) bus messages; selectively route the first I/O bus messages to a plurality of BMCs via a plurality of I/O buses coupling the ABC and the BMCs; receive second I/O bus messages from the BMCs via the I/O buses; convert the second I/O bus messages to second networking messages; and selectively route the second networking messages to the hybrid switch via the Ethernet networking list. 19. The non-transitory computer-readable media of claim 18 , wherein the instructions to selectively route the first I/O bus messages include instructions to selectively route the first I/O bus messages via a Low Pin Count (LPC) bus that includes 7 pins or fewer. 20. The non-transitory computer-readable media of claim 18 , wherein the instructions to receive second I/O bus messages include instructions to receive second I/O bus messages via a Low Pin Count (LPC) bus that includes 7 pins or fewer. 21. The non-transitory computer-readable media of claim 18 , wherein receiving, by an aggregate baseboard management controller (BMC) controller (ABC), first networking messages comprises receiving, by a control plane processor (CPP), first networking messages.

Assignees

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Classifications

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

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What does patent US9898435B2 cover?
Apparatuses, methods and storage media associated with the exchange of messages between a hybrid switch and one or more baseboard management controllers (BMCs) are described herein. Specifically, an aggregate BMC controller (ABC) may be communicatively coupled with both the hybrid switch and the BMCs and configured to facilitate the exchange of messages between the hybrid switch and the one or …
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F13/4022. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).