Dual-mode regulator circuit

US9898021B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9898021-B2
Application numberUS-201615367677-A
CountryUS
Kind codeB2
Filing dateDec 2, 2016
Priority dateDec 8, 2015
Publication dateFeb 20, 2018
Grant dateFeb 20, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure illustrates a dual-mode regulator circuit comprising: a first output terminal; a second output terminal; a switching regulator circuit coupled to the first output terminal and comprising a first transistor coupled between the first output terminal and ground; a linear regulator circuit coupled to the second output terminal and comprising a second transistor coupled between the second output terminal and a power source; a detection circuit configured to turn on the first transistor in order to connect the first output terminal to ground, turn on the second transistor in order to connect the second output terminal to the power source, and then generate a detection signal indicating whether an inductor is connected between the first and second output terminals; and a logic circuit configured to activate the switching regulator circuit or the linear regulator circuit according to the detection signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A dual-mode regulator circuit, comprising: a first output terminal; a second output terminal; a switching regulator circuit, coupled to the first output terminal, and comprising a first transistor coupled between the first output terminal and ground; a linear regulator circuit, coupled to the second output terminal, and comprising a second transistor coupled between the second output terminal and a power source; a detection circuit, configured to turn on the first transistor in order to connect the first output terminal to ground, turn on the second transistor in order to connect the second output terminal to the power source, then generate a detection signal indicating whether an inductor is connected between the first and second output terminals, and then activate the switching regulator circuit or the linear regulator circuit according to the detection signal. 2. The dual-mode regulator circuit according to claim 1 , wherein the detection circuit comprises: a comparator, comprising a first input terminal coupled to the first output terminal, and a second input terminal configured to receive a reference voltage or a voltage of the second output terminal; and a logic circuit, coupled to the comparator, the switching regulator circuit and the linear regulator circuit; wherein when a voltage of the first input terminal is lower than a voltage of the second input terminal, the comparator outputs the detection signal indicating that no inductor is connected between the first output terminal and the second output terminal, and then the logic circuit activates the linear regulator circuit to output voltage to the second output terminal according to the detection signal. 3. The dual-mode regulator circuit according to claim 2 , wherein when the voltage of the first input terminal is not lower than the voltage of the second input terminal, the comparator outputs the detection signal indicating that the inductor is connected between the first output terminal and the second output terminal, and then the logic circuit activates the switching regulator circuit to output voltage to the second output terminal via the inductor according to the detection signal. 4. The dual-mode regulator circuit according to claim 2 , wherein the switching regulator circuit further comprises a third transistor connected between the power source and the first output terminal. 5. The dual-mode regulator circuit according to claim 4 , wherein the first transistor is an n-channel transistor, and the second and third transistors are p-channel transistors. 6. The dual-mode regulator circuit according to claim 5 , wherein when the first output terminal and the second output terminal are disconnected, then the logic circuit activates the linear regulator circuit to output voltage to the second output terminal. 7. The dual-mode regulator circuit according to claim 4 , further comprising a selection circuit coupled between the second transistor and the third transistor and comprising a control terminal coupled to the logic circuit, and when the linear regulator circuit is activated to output voltage, the logic circuit controls the selection circuit in order to connect the second transistor and the third transistor in parallel. 8. The dual-mode regulator circuit according to claim 7 , wherein the selection circuit comprises a first switch connected between a gate of the first transistor and a gate of the second transistor, a second switch connected between an error amplifier of the linear regulator circuit and the gate of the second transistor, a third switch connected between the first output terminal and a drain of the second transistor, and a fourth switch connected between the drain of the second transistor and the second output terminal. 9. The dual-mode regulator circuit according to claim 1 , wherein the second output terminal is electrically connected to an electric load.

Assignees

Inventors

Classifications

  • including plural semiconductor devices as final control devices for a single load · CPC title

  • with a plurality of power processing stages connected in parallel · CPC title

  • G05F1/56Primary

    using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

  • using semiconductor devices only · CPC title

  • Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title

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What does patent US9898021B2 cover?
The present disclosure illustrates a dual-mode regulator circuit comprising: a first output terminal; a second output terminal; a switching regulator circuit coupled to the first output terminal and comprising a first transistor coupled between the first output terminal and ground; a linear regulator circuit coupled to the second output terminal and comprising a second transistor coupled betwee…
Who is the assignee on this patent?
Nuvoton Technology Corp
What technology area does this patent fall under?
Primary CPC classification G05F1/56. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).