Transmission driver impedance calibration circuit

Patent metadata

Field	Value
Publication number	US-9893718-B1
Application number	US-201615295299-A
Country	US
Kind code	B1
Filing date	Oct 17, 2016
Priority date	Oct 17, 2016
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

A transmission driver impedance calibration circuit and method. A circuit is disclosed that includes: a controller for controlling a set of switches; a comparator having an output that is coupled to the controller; and a first comparator input coupled to: a first selectable node coupled between a first p-type adjustable resistor segment (PSEG) and an external resistor; and a second selectable node coupled between a pair of internal resistors; and a second comparator input coupled to: a third selectable node coupled between a second PSEG and a tcoil resistor, the tcoil resistor being further coupled in series to a n-type adjustable resistor segment (NSEG); and a fourth selectable node coupled between the tcoil resistor and the NSEG.

First claim

What is claimed is:

1. A transmission driver impedance calibration circuit, comprising:
a controller for controlling a set of switches;
a comparator having an output that is coupled to the controller; and
a first comparator input coupled to:
a first selectable node coupled between a first p-type adjustable resistor segment (PSEG) and an external resistor; and
a second selectable node coupled between a pair of internal resistors; and

a second comparator input coupled to:
a third selectable node coupled between a second PSEG and a tcoil resistor, the tcoil resistor being further coupled in series to an n-type adjustable resistor segment (NSEG); and
a fourth selectable node coupled between the tcoil resistor and the NSEG.

2. The transmission driver impedance calibration circuit of claim 1 :
wherein the controller includes logic that implements a first configuration for calibrating the NSEG that includes activating the first selectable node and third selectable node;
wherein the controller includes logic that implements a second configuration for calibrating the second PSEG that includes first activating the second selectable node and third selectable node to determine a first PSEG setting, and then deactivating the third selectable node and activating the fourth selectable node to determine a second PSEG setting;
and wherein a final PSEG setting comprises an average of the first PSEG setting and second PSEG setting.

3. The transmission driver impedance calibration circuit of claim 1 , wherein the external resistor comprises a 200 ohm external precision resistor.

4. The transmission driver impedance calibration circuit of claim 1 , wherein the pair of internal resistors are arranged in series to form an internal resistor divider between a voltage I/O and a ground to generate a value of 0.5 times the voltage I/O at the first comparator input.

5. The transmission driver impedance calibration circuit of claim 1 , wherein the first PSEG and the external resistor are arranged in series between a voltage I/O and a ground to generate a value of 0.25 times the voltage I/O at the first comparator input.

6. The transmission driver impedance calibration circuit of claim 1 , wherein the second PSEG, tcoil resistor, and NSEG are arranged in series between a voltage I/O and a ground.

7. The transmission driver impedance calibration circuit of claim 1 , wherein the tcoil has an impedance of between 1 and 5 ohms.

8. A method of calibrating impedance for a transmission driver, comprising:
providing a comparator having: a first input that includes a first selectable node coupled between a first p-type adjustable resistor segment (PSEG) and an external resistor and a second selectable node coupled between a pair of internal resistors; and a second input that includes a third selectable node coupled between a second PSEG and a tcoil resistor, the tcoil resistor being further coupled in series to an n-type adjustable resistor segment (NSEG); and a fourth selectable node coupled between the tcoil resistor and the NSEG;
activating the first selectable node and third selectable node;
monitoring an output of the comparator while adjusting the NSEG to determine a setting for the NSEG;
activating the second selectable node and third selectable node;
monitoring the output of the comparator while adjusting the second PSEG to determine a first setting for the second PSEG;
activating the second selectable node and fourth selectable node;
monitoring the output of the comparator while adjusting the second PSEG to determine a second setting for the second PSEG;
averaging the first setting and second setting to provide a final setting for the second PSEG.

9. The method of claim 8 , wherein the external resistor comprises a 200 ohm external precision resistor.

10. The method of claim 8 , wherein the first PSEG and the external resistor are arranged in series between a voltage I/O and a ground to generate a value of 0.25 times the voltage I/O at the first comparator input.

11. The method of claim 8 , wherein the pair of internal resistors are arranged in series to form an internal resistor divider between a voltage I/O and a ground to generate a value of 0.5 times the voltage I/O at the first comparator input.

12. The method of claim 8 , wherein the second PSEG, tcoil resistor, and NSEG are arranged in series between a voltage I/O and a ground.

13. The method of claim 8 , wherein a controller is used to activate and deactivate the first, second, third and fourth selectable node.

14. The method of claim 8 , wherein the tcoil has an impedance of between 1 and 5 ohms.

15. A transmitter device having a transmission driver impedance calibration circuit, comprising:
a controller for controlling a set of switches;
a comparator having an output that is coupled to the controller; and
a first comparator input coupled to:
a first selectable node coupled between a first p-type adjustable resistor segment (PSEG) and an external resistor; and
a second selectable node coupled between a pair of internal resistors; and

a second comparator input coupled to:
a third selectable node coupled between a second PSEG and a tcoil resistor, the tcoil resistor being further coupled in series to an n-type adjustable resistor segment (NSEG); and
a fourth selectable node coupled between the tcoil resistor and the NSEG.

16. The transmitter device of claim 15 :
wherein the controller includes logic that implements a first configuration for calibrating the NSEG that includes activating the first selectable node and third selectable node;
wherein the controller includes logic that implements a second configuration for calibrating the second PSEG that includes first activating the second selectable node and third selectable node to determine a first PSEG setting, and then deactivating the third selectable node and activating the fourth selectable node to determine a second PSEG setting;
and wherein a final PSEG setting comprises an average of the first PSEG setting and second PSEG setting.

17. The transmitter device of claim 15 , wherein the external resistor comprises a 200 ohm external precision resistor and wherein the first PSEG and the external resistor are arranged in series between a voltage I/O and a ground to generate a value of 0.25 times the voltage I/O at the first comparator input.

18. The transmitter device of claim 15 , wherein the pair of internal resistors are arranged in series to form an internal resistor divider between a voltage I/O and a ground to generate a value of 0.5 times the voltage I/O at the first comparator input.

19. The transmitter device of claim 15 , wherein the second PSEG, tcoil resistor, and NSEG are arranged in series between a voltage I/O and a ground.

20. The transmitter device of claim 15 wherein the tcoil has an impedance of between 1 and 5 ohms.

Assignees

• Globalfoundries Inc

Inventors

• Shivaram Suhas
• Rangan Giri N K

Classifications

• H03H11/28

  Impedance matching networks · CPC title

• H03K3/012

  Modifications of generator to improve response time or to decrease power consumption · CPC title

• H03K5/24 Primary

  the characteristic being amplitude · CPC title

• H03K3/011 Primary

  Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} · CPC title

• H03K19/017545 Primary

  Coupling arrangements; Impedance matching circuits · CPC title