Protection circuit for electronic system

US9893512B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9893512-B2
Application numberUS-201615237762-A
CountryUS
Kind codeB2
Filing dateAug 16, 2016
Priority dateDec 30, 2014
Publication dateFeb 13, 2018
Grant dateFeb 13, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Damages to the rectifying MOSFET in the secondary side of voltage converters are reduced or eliminated by inserting intermediary steps between detecting a dropping in the converter output voltage V CC and activating the under voltage lock out (UVLO) circuitry. During the intermediary steps, the timing for switching off the MOSFET is advanced to prevent the current flow in the MOSFET from reversing its direction.

First claim

Opening claim text (preview).

We claim: 1. A voltage converter, comprising: a power MOSFET coupled to a secondary-side controller; the secondary-side controller, operable to sustain a V CC voltage at a V CC terminal; the secondary-side controller configured to trigger a first bias voltage when the V CC voltage is above a first preset value and to trigger a second bias voltage different from the first bias voltage when the V CC voltage is below the first preset voltage; and an under-voltage-lock-out (UVLO) circuitry, which is triggered when the V CC voltage is below a second preset voltage, which is below the first preset voltage. 2. The voltage converter of claim 1 , in which the first bias voltage corresponds to a first switching-off threshold voltage of the power MOSFET. 3. The voltage converter of claim 2 , in which the second bias voltage corresponds to a second switching-off threshold voltage of the power MOSFET, different from the first switching-off threshold voltage. 4. The voltage converter of claim 1 , in which the secondary controller and the power MOSFET are integrated in one chip. 5. A voltage converter having a primary side controller and a secondary-side controller, comprising; a primary-side UVLO circuitry and a secondary-side UVLO circuitry; and a primary-side UVLO triggering voltage and a secondary-side UVLO triggering voltage lower than the primary-side UVLO triggering voltage; the secondary-slide controller is operable to sustain a V CC voltage at a V CC terminal; the primary-side UVLO triggering voltage and the secondary-side UVLO triggering voltage being related to V CC , and the secondary-side controller is coupled to a power MOSFET, which is configured to turn off at a second turn-off voltage different from a first turn-off voltage. 6. The voltage converter of claim 5 , in which the secondary controller and the power MOSFET are integrated in one chip.

Assignees

Inventors

Classifications

  • involving comparison of the voltage or current values at two spaced portions of a single system, e.g. at opposite ends of one line, at input and output of apparatus {(for transformers H02H7/045)} · CPC title

  • H02H7/1227Primary

    responsive to abnormalities in the output circuit, e.g. short circuit · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9893512B2 cover?
Damages to the rectifying MOSFET in the secondary side of voltage converters are reduced or eliminated by inserting intermediary steps between detecting a dropping in the converter output voltage V CC and activating the under voltage lock out (UVLO) circuitry. During the intermediary steps, the timing for switching off the MOSFET is advanced to prevent the current flow in the MOSFET from rever…
Who is the assignee on this patent?
Diodes Inc, Doides Incorporated
What technology area does this patent fall under?
Primary CPC classification H02H7/1227. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 13 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).