Pixel compensation circuit and method

Patent metadata

Field	Value
Publication number	US-9892684-B2
Application number	US-201615021709-A
Country	US
Kind code	B2
Filing date	Feb 25, 2016
Priority date	Jan 29, 2016
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

A pixel compensation circuit contains first controllable switch's control terminal is connected to first scan line, and first terminal to data line; driving switch's control terminal is connected to second terminals of first and third controllable switches, and second terminal to OLED's anode and fifth controllable switch's first terminal, cathode to ground; second controllable switch's control terminal is connected to lighting control terminal, and first terminal to a voltage terminal; second scan line is connected to control terminals of third to fifth controllable switches, first terminals of the third and second controllable switches are connected; driving switch's first terminal is connected to second controllable switch's second terminal and fourth controllable switch's first terminal, reference voltage terminal is connected to second terminals of fourth and fifth switches; driving switch's control terminal is connected to its first terminal through storage capacitor.

First claim

What is claimed is:

1. A pixel compensation circuit comprising:
a first controllable switch having a control terminal connected to a first scan line, a first terminal connected to a data line, and a second terminal;
a driving switch having a control terminal connected to the second terminal of the first controllable switch, a first terminal, and a second terminal;
an Organic Light Emitting Diode (OLED) having an anode connected to the second terminal of the driving switch and a cathode connected to ground;
a second controllable switch having a control terminal connected to a lighting control terminal, a first terminal connected to a voltage terminal, and a second terminal connected to the first terminal of the driving switch;
a third controllable switch having a control terminal connected to a second scan line, a first terminal connected to the first terminal of the second controllable switch, and a second terminal connected to the control terminal of the driving switch;
a fourth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the first terminal of the driving switch, and a second terminal connected to a reference voltage terminal;
a fifth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the second terminal of the driving switch, and a second terminal connected to the reference voltage terminal; and
a storage capacitor having a first terminal connected to the control terminal of the driving switch and a second terminal connected to the first terminal of the driving switch.

2. The pixel compensation circuit as claimed in claim 1 , wherein the driving switch and the first to the fifth controllable switches are P-type metal oxide semiconductor (PMOS) thin-film transistors, N-type metal oxide semiconductor (NMOS) thin-film transistors, or a combination of PMOS and NMOS thin-film transistors; and the control terminal, first terminal, and second terminal of the driving switch and first to fifth controllable switches correspond to the gate, drain, and source of thin-film transistors, respectively.

3. A pixel compensation circuit comprising:
a first controllable switch having a control terminal connected to a first scan line, a first terminal connected to a data line, and a second terminal;
a driving switch having a control terminal connected to the second terminal of the first controllable switch, a first terminal, and a second terminal;
an Organic Light Emitting Diode (OLED) having an anode connected to the second terminal of the driving switch and a cathode connected to ground;
a second controllable switch having a control terminal connected to a lighting control terminal, a first terminal connected to a voltage terminal, and a second terminal connected to the first terminal of the driving switch;
a third controllable switch having a control terminal connected to a second scan line, a first terminal connected to the first terminal of the second controllable switch, and a second terminal connected to the control terminal of the driving switch;
a fourth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the first terminal of the driving switch, and a second terminal connected to a reference voltage terminal;
a fifth controllable switch having a control terminal connected to the second scan line, a first terminal connected to the second terminal of the driving switch, and a second terminal connected to the reference voltage terminal; and
a storage capacitor having a first terminal connected to the control terminal of the driving switch and a second terminal connected to the second terminal of the driving switch.

4. The pixel compensation circuit as claimed in claim 3 , wherein the driving switch and the first to the fifth controllable switches are P-type metal oxide semiconductor (PMOS) thin-film transistors, N-type metal oxide semiconductor (NMOS) thin-film transistors, or a combination of PMOS and NMOS thin-film transistors; and the control terminal, first terminal, and second terminal of the driving switch and first to fifth controllable switches correspond to the gate, drain, and source of thin-film transistors, respectively.

5. A pixel compensation method, comprising the steps of:
in a programming/lighting stage, a second scan line providing a high-level signal so that a third controllable switch, a fourth controllable switch, and a fifth controllable switches are cut off, and a first scan line and the lighting control terminal providing low-level signals so that a driving switch, a first controllable switch, and a second controllable switches are turned on, and an OLED is lighted up; and
in an electrical recovery stage, the second scan line providing a low-level signal so that the third, fourth, and fifth controllable switches are turned on, and the first scan line and the lighting control terminal providing high-level signals so that the driving switch, and the first and second controllable switches where, at the moment, the voltage at the control terminal of the driving switch is equal to a voltage output from a voltage terminal, the voltages at a first terminal and a second terminal of the driving switch are equal to a negative reference voltage output from a reference voltage terminal, and the driving switch electrically recovers while the OLED electrically recovers from the negative reference voltage at the first terminal of the driving switch.

6. The pixel compensation method as claimed in claim 5 , wherein the driving switch and the first to the fifth controllable switches are P-type metal oxide semiconductor (PMOS) thin-film transistors, N-type metal oxide semiconductor (NMOS) thin-film transistors, or a combination of PMOS and NMOS thin-film transistors; and the control terminal, first terminal, and second terminal of the driving switch and first to fifth controllable switches correspond to the gate, drain, and source of thin-film transistors, respectively.

Assignees

• Shenzhen China Star Optoelect
• Shenzhen China Star Optoelectroniccs Tech Co Ltd

Inventors

• Han Baixiang

Classifications

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/325 Primary

  the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver · CPC title

• G09G3/2092

  Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165) · CPC title

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title

• G09G3/007

  Use of pixel shift techniques, e.g. by mechanical shift of the physical pixels or by optical shift of the perceived pixels · CPC title