Method for powering a module incorporated within a system-on-a-chip and corresponding electronic device

US9891637B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9891637-B2
Application numberUS-201715696459-A
CountryUS
Kind codeB2
Filing dateSep 6, 2017
Priority dateMay 5, 2015
Publication dateFeb 13, 2018
Grant dateFeb 13, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A module incorporated within a system-on-a-chip operating in a steady-state power supply phase is powered by supplying to the module a regulated power supply voltage obtained from a feedback control loop. The receives a main power supply voltage and a negative feedback voltage. The negative feedback voltage is generated inside the system-on-a-chip starting from an effective supply voltage of the module and from a setpoint signal corresponding to a desired regulated power supply voltage.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for powering a module incorporated within a system-on-a-chip, comprising, in a steady-state power supply phase: supplying to the module a regulated power supply voltage obtained from a feedback control loop receiving a main power supply voltage and a negative feedback voltage, and generating the negative feedback voltage inside the system-on-a-chip starting from an effective supply voltage of the module and from a setpoint signal corresponding to a desired regulated power supply voltage, wherein generating the negative feedback voltage comprises: converting a setpoint digital word taken from the setpoint signal into a voltage offset analog signal; and adding the voltage offset analog signal to the effective supply voltage to produce the negative feedback voltage. 2. The method according to claim 1 , further comprising, in a power-up phase of the system-on-a-chip, avoiding making the regulation operate in open loop mode. 3. The method according to claim 2 , wherein avoiding comprises: placing into high impedance a setpoint output of the system-on-a-chip configured to deliver the negative feedback voltage in steady-state mode, and establishing a temporary feedback control loop using a resistor connected between a power supply input of the system-on-a-chip receiving the regulated power supply voltage and the setpoint output. 4. The method according to claim 3 , further comprising placing the setpoint output into low impedance during the transition between the power-up phase and the steady-state power supply phase so as to re-establish the feedback control loop going via the system-on-a-chip. 5. The method according to claim 2 , further comprising, in the power-up phase, directly delivering the effective supply voltage to a setpoint output of the system-on-a-chip configured to deliver the negative feedback voltage in steady-state mode. 6. An electronic device, comprising: a system-on-a-chip, comprising: a power supply input configured to receive a regulated power supply voltage, a circuit module configured to be powered by the regulated power supply voltage, a controller configured to generate a setpoint signal corresponding to a desired regulated power supply voltage for the circuit module, a voltage adaptation circuit configured to generate a negative feedback voltage starting from an effective supply voltage of the module and from the setpoint signal, and a setpoint output configured to deliver the negative feedback voltage, a voltage regulator, comprising: a regulation output coupled to the power supply input, and a negative feedback input coupled to the setpoint output, wherein the voltage regulator is configured to deliver the regulated power supply voltage to the regulation output starting from a main power supply voltage and from the negative feedback voltage; and wherein the voltage adaptation circuit comprises: a digital-analog converter configured to deliver, in the presence of a setpoint digital word taken from the setpoint signal, a voltage offset analog signal; and an adder circuit configured to add the voltage offset analog signal to the effective supply voltage to generate the negative feedback voltage. 7. The device according to claim 6 , wherein the voltage regulator is a switch-mode regulator comprising: a switching circuit connected between a main input for receiving the main power supply voltage and the regulation output, and a comparator generating a control signal for controlling the switching circuit using a comparator having a first comparator input designed to be connected to a reference voltage and a second comparator input coupled to the negative feedback input via a divider circuit. 8. The device according to claim 6 , further comprising a protection circuit configured to avoid, when the system-on-a-chip is powered up, an operation of the voltage regulator in an open loop mode. 9. The device according to claim 8 , wherein the protection circuit comprises a controllable switch configured for shunting the adder circuit in such a manner as to deliver the effective supply voltage to the setpoint output as long as the voltage adaptation circuit is not powered. 10. The device according to claim 6 , further comprising an auto-power supply for the voltage adaptation circuit. 11. The device according to claim 10 , further comprising a controllable switch configured for shunting the adder circuit so as to deliver the effective supply voltage to the setpoint output when the conversion circuit is not powered. 12. A device, comprising: a voltage regulator circuit having a regulated voltage output and an input configured to receive a feedback control voltage, the voltage regulator circuit generating a regulated voltage at the regulated voltage output in response to the feedback control voltage; an application circuit powered by the regulated voltage, said application circuit including: a processor executing an application configured to output a setpoint signal indicative of a desired supply voltage for the processor; a sense circuit configured to sense an actual supply voltage for the processor; and a conversion circuit configured to generate said feedback control voltage in response to the sensed actual supply voltage and the setpoint signal; wherein said conversion circuit comprises: an analog to digital converter configured to convert the setpoint signal to an offset voltage; and an adder circuit configured to add the offset voltage to the sensed actual supply voltage to generate said feedback control voltage. 13. The device of claim 12 , wherein the voltage regulator circuit comprises: a comparator configured to compare a voltage derived from the feedback control voltage to a reference voltage; control logic configured to generate a switch control signal from an output of the comparator; and a switch coupled between a supply source and the regulated voltage output, said switch selectively actuated in response to said switch control signal.

Assignees

Inventors

Classifications

  • Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

  • G05F1/46Primary

    wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) · CPC title

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What does patent US9891637B2 cover?
A module incorporated within a system-on-a-chip operating in a steady-state power supply phase is powered by supplying to the module a regulated power supply voltage obtained from a feedback control loop. The receives a main power supply voltage and a negative feedback voltage. The negative feedback voltage is generated inside the system-on-a-chip starting from an effective supply voltage of th…
Who is the assignee on this patent?
Stmicroelectronics Grand Ouest Sas
What technology area does this patent fall under?
Primary CPC classification G05F1/46. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 13 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).