Array substrate, liquid crystal display panel and display device

Patent metadata

Field	Value
Publication number	US-9891469-B2
Application number	US-201515037879-A
Country	US
Kind code	B2
Filing date	Dec 29, 2015
Priority date	Aug 3, 2015
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

An array substrate, a liquid crystal display (LCD) panel and a display device are provided. The array substrate ( 10 ) includes a base substrate ( 100 ) and a plurality of subpixels ( 103 ) disposed on the base substrate ( 100 ), wherein an area of each of the subpixels ( 103 ) includes a plurality of transmissive regions ( 105 ) and a plurality of reflective regions ( 104 ).

First claim

The invention claimed is:

1. An array substrate, comprising a base substrate and a plurality of subpixels disposed on the base substrate, wherein an area of each of the subpixels includes a plurality of transmissive regions and a plurality of reflective regions,
wherein each of the subpixels is provided with a wire grid polarizer (WGP); the WGP in each of the subpixels includes a plurality of groups of metal wires in parallel arrangement disposed in the plurality of reflective regions; each reflective region is provided with one group of metal wires in parallel arrangement; and the plurality of metal wires in parallel arrangement in the WGP are configured to transmit linearly polarized light with a polarization direction perpendicular to an extension direction of the metal wires and reflect linearly polarized light with a polarization direction parallel to the extension direction of the metal wires,
wherein, the array substrate further comprises:
a plurality of gate lines, wherein the WGP and the plurality of gate lines are arranged in a same layer and insulated from each other; and
common electrode lines which are arranged in a same layer and have a same extension direction with the gate lines, wherein the WGP in each of the subpixels is electrically connected with the common electrode lines.

2. The array substrate according to claim 1 , wherein the transmissive regions and the reflective regions are alternately arranged in a first direction.

3. The array substrate according to claim 2 , wherein the transmissive regions and the reflective regions are alternately arranged in a second direction which is perpendicular to the first direction.

4. The array substrate according to claim 1 , wherein the plurality of transmissive regions and/or the plurality of reflective regions in the area of each of the subpixels are uniformly distributed in the each of the subpixels.

5. The array substrate according to claim 1 , wherein the metal wires are made of at least one selected from the group consisted of aluminum, chromium, copper, silver, nickel, iron and cobalt.

6. The array substrate according to claim 1 , further comprising a plurality of data lines, wherein the WGP and the plurality of data lines are arranged in a same layer and insulated from each other.

7. The array substrate according to claim 1 , wherein the WGP in each of the subpixels is electrically connected with a pixel electrode in the each of the subpixels.

8. The array substrate according to claim 1 , further comprising a thin film transistor, wherein the WGP is multiplexed as a pixel electrode in each of the subpixels; and the pixel electrode is electrically connected with a drain electrode of the thin film transistor.

9. The array substrate according to claim 8 , wherein the pixel electrode in each of the subpixels is a slit electrode or a comb electrode.

10. The array substrate according to claim 1 , wherein the WGP in each of the subpixels is multiplexed as a common electrode in the each of the subpixels.

11. The array substrate according to claim 10 , wherein the common electrode in the each of the subpixel is a slit electrode.

12. The array substrate according to claim 1 , wherein the WGP is multiplexed as a pixel electrode and a common electrode being arranged in a same layer and having an interdigital structure.

13. The array substrate according to claim 1 , wherein in each of the subpixels, a transparent metal oxide conductive layer is disposed on the WGP.

14. The array substrate according to claim 13 , wherein in each of the subpixels, the transparent metal oxide conductive layer and the WGP have a same pattern.

15. A liquid crystal display (LCD) panel, comprising: an array substrate and a counter substrate which are arranged opposite to each other, and a liquid crystal layer filled between the array substrate and the counter substrate, wherein
the array substrate is the array substrate according to claim 1 .

16. A display device, comprising the LCD panel according to claim 15 .

Assignees

• Boe Technology Group Co Ltd

Inventors

• Wang Yingtao

Classifications

• G02F2001/134345

  Physics · mapped topic

• G02F1/13439

  characterised by their electrical, optical, physical properties; materials therefor; method of making · CPC title

• G02F2001/133548

  Physics · mapped topic

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/133536

  Reflective polarizers (G02F1/13362 takes precedence) · CPC title