Imaging systems and methods for performing unboosted image sensor pixel conversion gain adjustments

Patent metadata

Field	Value
Publication number	US-9888191-B2
Application number	US-201514692512-A
Country	US
Kind code	B2
Filing date	Apr 21, 2015
Priority date	Apr 21, 2015
Publication date	Feb 6, 2018
Grant date	Feb 6, 2018

Abstract

An image sensor may include an array of pixels arranged in rows and columns. Each pixel may include a floating diffusion node, a capacitor, a dual conversion gain (DCG) transistor having a gate terminal coupled to the floating diffusion, a source terminal, and a drain terminal coupled to the floating diffusion through the capacitor. Column readout circuitry may provide per-column control signals to the source terminal of the DCG transistor in the pixels of a selected row to place the pixels into a low conversion gain mode by turning the DCG transistor on and into a high conversion gain mode by turning the DCG transistor off. In this way, the readout circuitry may provide per-column conversion gains for each row without boosting DCG control signals to magnitudes greater than the pixel supply voltage, thereby reducing voltage stress on the pixel array and improving lifetime of the image sensor.

First claim

What is claimed is:

1. An image sensor pixel, comprising:
control circuitry;
a charge storage region;
a dual conversion gain transistor having a gate terminal coupled to the charge storage region, a source terminal coupled to the control circuitry, and a drain terminal; and
a capacitor coupled between the drain terminal of the dual conversion gain transistor and the charge storage region.

2. The image sensor pixel defined in claim 1 , wherein the dual conversion gain transistor is configured to place the image sensor pixel into a low conversion gain mode when the dual conversion gain transistor is turned on and wherein the dual conversion gain transistor is configured to place the image sensor pixel into a high conversion gain mode when the dual conversion gain transistor is turned off.

3. The image sensor pixel defined in claim 1 , wherein the image sensor pixel is formed in an array of image sensor pixels arranged in rows and columns, wherein the control circuitry comprises column readout circuitry, wherein the columns of image sensor pixels in the array are coupled to the column readout circuitry via a plurality of conductive column lines, and wherein the source terminal of the dual conversion gain transistor is coupled to the column readout circuitry via a corresponding one of the plurality of conductive column lines.

4. The image sensor pixel defined in claim 3 , wherein the dual conversion gain transistor is controlled by a dual conversion gain control signal received at the source terminal of the dual conversion gain transistor from the column readout circuitry.

5. The image sensor pixel defined in claim 4 , wherein the charge storage region has a first voltage level and the dual conversion gain transistor is configured to turn on in response to the dual conversion gain control signal having a magnitude that is less than the first voltage level by a predetermined amount.

6. The image sensor pixel defined in claim 5 , wherein the dual conversion gain transistor is configured to turn off in response to the dual conversion gain control signal having a magnitude that is greater than the first voltage level minus the predetermined amount.

7. The image sensor pixel defined in claim 1 , further comprising:
a charge transfer gate; and
a photosensitive region coupled between a terminal that receives a ground voltage level and the charge transfer gate, wherein the photosensitive region is coupled to the charge storage region through the charge transfer gate.

8. The image sensor pixel defined in claim 7 , further comprising:
an additional terminal that receives a power supply voltage level; and
a reset transistor coupled between the charge storage region and the additional terminal.

9. The image sensor pixel defined in claim 8 , wherein the dual conversion gain transistor is configured to place the image sensor pixel in one of a high conversion gain mode and a low conversion gain mode based on a control signal received at the source terminal of the dual conversion gain transistor having a voltage magnitude that is greater than or equal to the ground voltage level and that is less than or equal to the power supply voltage level.

10. The image sensor pixel defined in claim 9 , further comprising:
a column readout line, wherein the image sensor pixel is coupled to column control and readout circuitry via the column readout line; and
a source follower transistor coupled between the charge storage region and the column readout line.

11. A method of operating an imaging system having control circuitry and an array of image sensor pixels arranged in rows and columns, the method comprising:
with the control circuitry, providing a dual conversion gain control signal to a source terminal of a dual conversion gain transistor in an image sensor pixel of a selected row of the array to control the image sensor pixel to exhibit a selected conversion gain; and
with the control circuitry, reading out image signals from a floating diffusion region of the image sensor pixel in the selected row of the array while the image sensor pixel exhibits the selected conversion gain.

12. The method defined in claim 11 , further comprising:
with the control circuitry, providing an additional dual conversion gain control signal to an additional source terminal of an additional dual conversion gain transistor in an additional image sensor pixel of the selected row of the array to control the additional image sensor pixel to exhibit an additional selected conversion gain that is different from the selected conversion gain; and
with the control circuitry, reading out additional image signals from an additional floating diffusion region of the additional image sensor pixel while the additional image sensor pixel exhibits the additional selected conversion gain concurrently with reading out the image signals from the floating diffusion region of the image sensor pixel while the image sensor pixel exhibits the selected conversion gain.

13. The method defined in claim 11 , further comprising:
with the control circuitry, determining whether to adjust the selected conversion gain based on the image signals read out from the floating diffusion region of the image sensor pixel;
with the control circuitry, controlling the image sensor pixel to exhibit an additional selected conversion gain that is different from the selected conversion gain in response to determining to adjust the selected conversion gain; and
with the control circuitry, reading out additional image signals from the floating diffusion region of the image sensor pixel while the image sensor pixel exhibits the additional selected conversion gain.

14. The method defined in claim 11 , wherein the floating diffusion region exhibits a first voltage level, the method further comprising:
with the control circuitry, placing the image sensor pixel in a low conversion gain mode by providing the dual conversion gain control signal at a second voltage level that is less than the first voltage level.

15. The method defined in claim 14 , further comprising:
with the control circuitry, placing the image sensor pixel in a high conversion gain mode by providing the dual conversion gain control signal at a third voltage level that is greater than the second voltage level.

16. The method defined in claim 15 , further comprising:
with the control circuitry, controlling a reset transistor in the image sensor pixel to reset the floating diffusion region in the image sensor pixel to a reset voltage level, wherein the third voltage level comprises the reset voltage level and the second voltage level comprises a ground voltage level.

17. The method defined in claim 11 , wherein the image sensor pixel is formed in a first column and first row of the array and the array includes an additional image sensor pixel formed in the first column and a second row of the array, wherein the second row of the array is adjacent to the first row of the array, the method comprising:
with the control circuitry, determining an additional selected conversion gain for the additional image sensor pixel in the second row based on the image signals read out from the image sensor pixel in the first row;
with the control circuitry, controlling the additional image sensor pixel in the second row to exhibit the additional selected conversion gain; and
with the control circuitry, reading out additional image signals from the additional image sensor pixel in the second row while the additional image sensor pixel exhibits the additional selected conversion gain.

18.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Beck Jeffery

Classifications

• H04N25/59 Primary

  by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title

• H04N23/76 Primary

  by influencing the image signals · CPC title

• H04N5/3559 Primary

  Electricity · mapped topic

• H04N5/243

  Electricity · mapped topic