Efficient voltage conversion

Patent metadata

Field	Value
Publication number	US-9887623-B2
Application number	US-201615291092-A
Country	US
Kind code	B2
Filing date	Oct 12, 2016
Priority date	Dec 11, 2014
Publication date	Feb 6, 2018
Grant date	Feb 6, 2018

Abstract

An apparatus for providing on-chip voltage-regulated power includes a switched capacitor voltage conversion circuit that receives an elevated power demand signal and operates at a base rate when the elevated power demand signal is not active and at an elevated rate when the elevated power demand signal is active. The switched capacitor voltage conversion circuit comprises an auxiliary set of transistors that are disabled, when the elevated power demand signal is not active and enabled, when the elevated power demand signal is active. The apparatus may also include a droop detection circuit that monitors a monitored power signal and activates the elevated power demand signal in response to the monitored power signal dropping below a selected voltage level. The monitored power signal may be a voltage input provided by an input power supply for the switched capacitor voltage conversion circuit. A corresponding method is also disclosed herein.

First claim

What is claimed is:

1. An apparatus for providing on-chip voltage-regulated power, the apparatus comprising:
a switched capacitor voltage conversion circuit configured to receive an elevated power demand signal and operate at a base rate at a selected voltage when the elevated power demand signal is not active and an elevated rate at the selected voltage when the elevated power demand signal is active;
wherein the switched capacitor voltage conversion circuit comprises an auxiliary set of transistors that are disabled when the elevated power demand signal is not active and enabled when the elevated power demand signal is active to provide additional output current at the selected voltage; and
a clocking circuit configured to provide a clocking signal at a base rate when the elevated power demand signal is not active and at an elevated rate when the elevated power demand signal is active.

2. The apparatus of claim 1 , wherein the clocking circuit comprises a flip-flop that is selectively configurable to operate in a single edge mode and a dual edge mode.

3. The apparatus of claim 1 , wherein the elevated rate is an integer multiple of the base rate.

4. The apparatus of claim 3 , wherein the elevated rate is twice the base rate.

5. The apparatus of claim 1 , wherein the auxiliary set of transistors reduce an RC time constant of the switched capacitor voltage converter when the elevated power demand signal is active.

6. A method for providing on-chip voltage-regulated power, the method comprising:
converting a power input to a power output by operating a switched capacitor voltage conversion circuit at a base rate at a selected voltage during normal power demand conditions and an elevated rate at the selected voltage during elevated power demand conditions; and
wherein the switched capacitor voltage conversion circuit comprises an auxiliary set of transistors that are disabled during normal power demand conditions and enabled during elevated power demand conditions to provide additional output current at the selected voltage; and
providing a clocking signal for the switched capacitor voltage conversion circuit at a base rate when the elevated power demand signal is not active and at an elevated rate when the elevated power demand signal is active.

7. The method of claim 6 , wherein the elevated rate is an integer multiple of the base rate.

8. The method of claim 7 , wherein the elevated rate is twice the base rate.

9. The method of claim 6 , wherein the auxiliary set of transistors reduce an RC time constant of the switched capacitor voltage conversion circuit when the elevated power demand signal is active.

10. An apparatus for providing on-chip voltage-regulated power, the apparatus comprising:
a switched capacitor voltage conversion circuit comprising a base set of transistors and an auxiliary set of transistors, the switched capacitor voltage conversion circuit configured to receive an elevated power demand signal and operate at a base rate at a selected voltage when the elevated power demand signal is not active and an elevated rate at the selected voltage when the elevated power demand signal is active;
wherein the auxiliary set of transistors are disabled when the elevated power demand signal is not active and enabled when the elevated power demand signal is active to provide additional output current at the selected voltage; and
wherein the auxiliary set of transistors reduce an RC time constant of the switched capacitor voltage conversion circuit when enabled;
a clocking circuit configured to provide a clocking signal at a base rate when the elevated power demand signal is not active and at an elevated rate when the elevated power demand signal is active; and
wherein the clocking circuit comprises a flip-flop that is selectively configurable to operate in a single edge mode and a dual edge mode.

11. The apparatus of claim 10 , wherein the monitored power signal corresponds to an input power supply for the switched capacitor voltage conversion circuit.

Assignees

• IBM

Inventors

• Chang Leland
• Montoye Robert K
• Seo Jae Sun
• Young Albert M

Classifications

• H02M3/155

  using semiconductor devices only · CPC title

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title