Method for producing a switching device with a moisture-tight and electrically insulating cover and for producing an arrangement therewith

Patent metadata

Field	Value
Publication number	US-9883596-B2
Application number	US-201514924679-A
Country	US
Kind code	B2
Filing date	Oct 27, 2015
Priority date	Oct 27, 2014
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

A method for producing a power electronic switching device comprising a substrate, having a power semiconductor component arranged thereon; a connection device, and terminal devices. The method comprises: Providing the substrate with an insulation ply and conductor tracks electrically insulated from one another, wherein a power semiconductor component is arranged on a conductor track and is cohesively connected thereto; Arranging the connection device embodied as a film stack; Arranging a thin pressure- and temperature-resistant and moisture-blocking insulation layer along a surface contour of the connection device and comprising a covering section and an overlap section, which overlaps the connection device circumferentially and covers the substrate in a circumferential contact region; Cohesively connecting the connection device to the substrate, whereby the connection device connects the switching device in a circuit-conforming manner internally; Connecting the covering section to the connection device; Connecting the overlap section to the contact region.

First claim

What is claimed is:

1. A method for producing a power electronic switching device, the power electronics switching device comprising a substrate, a power semiconductor component arranged on the substrate, a connection device and terminal devices, the method comprising the following steps:
A. providing the substrate with an insulation ply and at least first and second conductor tracks electrically insulated from one another, wherein the power semiconductor component is arranged on one of said first and second conductor tracks and is cohesively connected to said one of said first and second conductor tracks;
B. arranging the connection device as a layered film stack having alternating layers with at least two electrically conductive, intrinsically structured films, and an electrically insulating film between said two conductive films;
C. applying a thin pressure- and temperature-resistant and moisture-blocking insulation layer to a surface contour of the connection device, said insulation layer comprising a covering section which covers the connection device and an overlap section, which overlaps the connection device circumferentially on all sides and covers the substrate in a circumferential contact region;
D. cohesively connecting the connection device to the substrate, whereby the power electronic switching device is connected in a circuit-conforming manner internally by means of the connection device;
E. connecting said covering section of said insulation layer to the connection device; and
F. connecting said overlap section of said insulation layer to said contact region of the substrate.

2. The method of claim 1 , wherein the method steps are performed in the order A-B-C-D-E-F and method steps E and F are performed simultaneously.

3. The method of claim 1 , wherein the method steps are performed in the order A-B-D-C-E-F, and method steps E and F are performed simultaneously.

4. The method of claim 1 , wherein the method steps are performed in the order A-E-B-C-D-F.

5. The method of claim 1 , wherein the method steps are performed in the order A-E-B-D-C-F.

6. The method of claim 1 , wherein the method steps are performed in the order A-B-C-D-E-F and method steps D, E and F are performed simultaneously.

7. The method of claim 1 , wherein at least the covering section of the insulation layer has a thickness in the range having a maximum of about 1 mm, and a minimum of about 50 μm.

8. The method of claim 7 , wherein said thickness of at least said covering section of said insulation layer has a minimum of at least about 150 μm.

9. The method of claim 1 , wherein said insulation layer is composed of polyphenylene sulfide.

10. The method of claim 1 , wherein said insulation layer is composed of a liquid crystal polymer.

11. The method of claim 1 , wherein said insulation layer is formed as a film and is arranged as such.

12. The method of claim 11 , wherein said film is formed with one or more plies.

13. The method of claim 12 , wherein said film has at least three plies including at least one metallic intermediate ply.

14. The method of claim 11 , wherein said film bears directly on the connection device to the extent of at least about 90%.

15. The method of claim 14 , wherein said film bears directly on the connection device to the extent of at least about 95%.

16. The method of claim 1 , wherein said insulation layer, prior to being arranged, is in liquid form, and is arranged by one of spraying and pouring.

17. The method of claim 16 , wherein the liquid form of said insulation layer is cured after being arranged.

18. The method of claim 1 , wherein said contact region of the substrate comprises area sections of conductor tracks and area sections of the insulation ply and in its course the transition between these area sections are formed in a continuous fashion.

19. A method for producing an arrangement comprising a power electronic switching device, a cooling device and a pressure device having a pressure body with a first cutout, including an elastic pressure element projecting therefrom, the method comprising the following steps in this order:
a) providing the power electronic switching device produced by claim 1 ;
b) arranging the power electronic switching device on the cooling device;
c) arranging the pressure device, so that the pressure element presses on a section of said insulation layer which, in projection along the direction of the normal to the power semiconductor component, is arranged within the area of the power semiconductor component; and
d) applying pressure to the conductor track and thus thermally linking the substrate of the circuit arrangement to the cooling device.

20. The method of claim 19 , wherein the cooling device is a baseplate of one of a power semiconductor module and a heat sink.

21. The method of claim 19 , wherein the pressure element in projection covers at least about 60% of the area of the power semiconductor component.

22. The method of claim 19 , wherein the pressure device has a spring-elastic pressure introducing body that exerts pressure centrally on the pressure device.

Assignees

• Semikron Elektronik Gmbh & Co Kg

Inventors

• Göbl Christian
• Heilbronner Heinrich

Classifications

• H10W72/874

  On different surfaces · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/07331

  Connecting techniques · CPC title

• H10W40/22

  characterised by their shape, e.g. having conical or cylindrical projections · CPC title

• H10W90/701 Primary

  characterised by the relative positions of pads or connectors relative to package parts · CPC title