Signal line path and manufacturing method therefor
US-9374886-B2 · Jun 21, 2016 · US
US9883584B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9883584-B2 |
| Application number | US-201615503752-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 1, 2016 |
| Priority date | Aug 6, 2015 |
| Publication date | Jan 30, 2018 |
| Grant date | Jan 30, 2018 |
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[Problem to be Solved] A multilayer flexible printed circuit board having a strip line advantageous to folding is provided. [Solution] A multilayer flexible printed circuit board 100 of an embodiment is a multilayer flexible printed circuit board having a strip line foldable at a folding part F 1 , the board including: a flexible insulative substrate 30 ; an inner layer circuit pattern 5 provided inside the flexible insulative substrate 30 and including a signal line 6 extending in a predetermined direction; a ground thin film 14 a constituting a ground layer at least in the folding part F 1 out of a ground layer of the strip line and constituted of a nonelectrolytic plating coat 14 formed on the flexible insulative substrate 30 ; and a protective layer 20 that covers the ground thin film 14 a and is in close contact with an exposed part 19 from which the flexible insulative substrate 30 is exposed.
Opening claim text (preview).
The invention claimed is: 1. A method of manufacturing a multilayer flexible printed circuit board having a strip line foldable at a folding part, the method comprising: a process of preparing a laminate body having a flexible insulative substrate, an inner layer circuit pattern provided inside the flexible insulative substrate and including a signal line extending in a predetermined direction, and metal foils covering both sides of the flexible insulative substrate; an opening part forming process of removing the metal foils at least in the folding part out of a ground layer formation scheduled region to form an opening part from a bottom face of which the flexible insulative substrate is exposed; a nonelectrolytic plating process of forming a nonelectrolytic plating coat on the flexible insulative substrate that is exposed from the bottom face of the opening part by a nonelectrolytic plating method; an etching mask forming process of forming an etching mask covering the nonelectrolytic plating coat; an exposed part forming process of removing the nonelectrolytic plating coat that is not covered by the etching mask to form a ground thin film constituted of the nonelectrolytic plating coat and an exposed part from which the flexible insulative substrate is exposed; and a protective layer forming process of forming a protective layer that covers the ground thin film and is in close contact with the exposed part. 2. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , wherein in the opening part forming process, a mask hole for forming a conduction hole is formed along with the opening part by etching the metal foil, between the opening part forming process and the nonelectrolytic plating process, laser processing using the mask hole is performed to form the conduction hole, in the nonelectrolytic plating process, a nonelectrolytic plating coat is formed in the conduction hole as well as in the opening part, between the nonelectrolytic plating process and the etching mask forming process, a plating mask that covers the opening part and does not cover the conduction hole or a peripheral part of the conduction hole peripheral part is formed, after that, an electrolytic plating coat is formed in the conduction hole and the peripheral part of the conduction hole peripheral part by an electrolytic plating method to produce an interlayer conductive path, in the etching mask forming process, the etching mask is formed so as to have a shape corresponding to a desired outer layer circuit pattern after removing the plating mask, and in the exposed part forming process, the ground thin film and the exposed part are formed and the outer layer circuit pattern is formed by etching processing using the etching mask. 3. The method of manufacturing a multilayer flexible printed circuit board according to claim 2 , wherein the interlayer conductive path is produced so as not to overlap with a signal line region having the signal line projected on the metal foil, and the protective layer is formed so as to cover the interlayer conductive path. 4. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , wherein in the exposed part forming process, the exposed part is formed so as to extend on both sides of the ground thin film in the direction in which the signal line extends. 5. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , wherein in the exposed part forming process, a ground thin film opening part from a bottom face of which the flexible insulative substrate is exposed is formed in the ground thin film. 6. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , wherein in the nonelectrolytic plating process, the nonelectrolytic plating coat is formed to have 0.1 μm to 1.5 μm of thickness. 7. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , wherein in the protective layer forming process, the protective layer is formed of a material having adhesion to the nonelectrolytic plating coat. 8. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , further comprising, between the nonelectrolytic plating process and the protective layer forming process, a process of depositing fine metal crystals on the nonelectrolytic plating coat to roughen a surface of the nonelectrolytic plating coat. 9. The method of manufacturing a multilayer flexible printed circuit board according to claim 1 , further comprising, between the nonelectrolytic plating process and the protective layer forming process, a process of performing chemical processing using a nonetchable adhesion assistant on the nonelectrolytic plating coat.
Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor (other insulating materials H05K3/387) · CPC title
by means of a preformed insulating foil (H05K3/284 takes precedence) · CPC title
Bending or folding regions of flexible printed circuits (H05K1/0283 takes precedence) · CPC title
Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)} · CPC title
Coating free areas, e.g. areas other than pads or lands free of solder resist · CPC title
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