Multiple bit rate video decoding

US9883194B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9883194-B2
Application numberUS-201514739442-A
CountryUS
Kind codeB2
Filing dateJun 15, 2015
Priority dateJun 15, 2015
Publication dateJan 30, 2018
Grant dateJan 30, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

In a video processing system including a video decoder, to handle frequent changes in the bit rate of an encoded bitstream, a video decoder can be configured to process a change in bit rates without reinitializing. The video decoder can be configured to reduce memory utilization. The video decoder can be configured both to process a change in bit rate without reinitializing while reducing memory utilization. In one implementation, the video processing system can include an interface between an application running on a host processor and the video decoder which allows the video decoder to communicate with the host application about the configuration of the video decoder.

First claim

Opening claim text (preview).

What is claimed is: 1. A computing device comprising a video processing system, the video processing system comprising: a video decoder comprising: an input configured to receive, for an encoded bitstream of video data, indices of frames of the encoded video data and information describing a format of the encoded video data; and an output configured to provide decoded video data, the encoded video data comprising encoded video data in a plurality of formats; and memory accessible by the video decoder and configured to store the encoded bitstream and data from the output of the video decoder at least based on the video decoder decoding the encoded bitstream; the video decoder configured to: compute addresses in the memory at least using the one or more indices of the one or more frames and the format of the video data; access and decode the encoded bitstream; and output decoded video data at least based on the computed addresses; wherein the memory is configured to store an array of textures, the array of textures including, for video data in the plurality of formats, a first set of a first number of memory locations configured to store the data produced by the video decoder based on decoding of the encoded bitstream of video data in a first format, and a second set of second number of memory locations configured to store the data produced by the video decoder based on decoding of the encoded bitstream of video data in a second format, wherein, after a change from the first format to the second format, the video decoder deallocates memory locations in the first set after completing processing of an image of video data in the first format and allocates memory locations in the second set for images to be processed in the second format, while the video decoder is decoding the encoded bitstream. 2. The computing device of claim 1 , further comprising: a media playback application that, when executed on the computing device, configures the computing device to request a video program from a server computer over a computer network so as to cause the server computer to provide, to the computing device, the requested video program as the encoded bitstream of video data. 3. The computing device of claim 2 , wherein the requested video program provided as the encoded bitstream of video data includes streamed video data in the plurality of formats such that a format of the video data changes while the video data is being streamed from the server computer to the computing device. 4. The computing device of claim 1 , wherein the video processing system further comprises: a control application executing on a processing unit of the computing device; and the video decoder being accessible to and controlled by the processing unit and comprising an interface configured to output to the control application information indicating whether the video decoder uses the array of textures; the control application configuring the processing unit to output the indication of one or more indices for one or more frames of the video data and the format of the video data to the video decoder according to the information. 5. The computing device of claim 1 , wherein the video decoder comprises a shader configured to be executable on a graphics processing unit of the computing device. 6. The computing device of claim 1 , wherein the video decoder comprises dedicated decoding logic in a graphics processing unit of the computing device. 7. The computing device of claim 1 wherein the array of textures is defined in a form of a ring buffer of textures, including one or more textures of a first size for images from video data in the first format and one or more textures of a second size for images from video data in the second format. 8. A computer-implemented process performed by a computing device comprising a video decoder, the process comprising: receiving, into a memory of the computing device, an encoded bitstream of video data comprising encoded video data in a plurality of formats, indices of frames of the encoded video data, and information describing a format of the encoded video data; configuring the memory to store video data, produced by the video decoder based on decoding of the encoded bitstream, in an array of textures, the array of textures including, for video data in the plurality of formats, a first set of a first number of memory locations configured to store the data produced by the video decoder based on decoding of the encoded bitstream of video data in a first format, and a second set of a second number of memory locations configured to store the data produced by the video decoder based on decoding of the encoded bitstream of video data in a second format, wherein, after a change from the first format to the second format, the video decoder deallocates memory locations in the first set after completing processing of an image of video data in the first format and allocates memory locations in the second set being allocated so as to change for images to be processed in the second format, while the video decoder is decoding the encoded bitstream; providing the video decoder with an indication of one or more of the indices for one or more of the frames of the video data to be decoded and the format of the video data; computing, by the video decoder, addresses in the memory at least using the one or more indices of the one or more frames and the format of the video data; and accessing and decoding, by the video decoder, the encoded bitstream from the memory at least using the computed addresses, to output decoded video data at least based on the computed addresses. 9. The computer-implemented process of claim 8 , further comprising: requesting a video program from a server computer over a computer network so as to cause the server computer to provide the requested video program as the encoded bitstream of video data. 10. The computer-implemented process of claim 9 , wherein the requested video program provided as the encoded bitstream of video data includes streamed video data in the plurality of formats such that a format of the video data changes while the video data is being streamed from the server computer to the computing device. 11. The computer-implemented process of claim 8 , further comprising: accessing, by a processing unit, information indicating whether the video decoder uses the array of textures; and outputting, by the processing unit, the indication of one or more indices for one or more frames of the video data and the format of the video data to the video decoder according to the information. 12. The computer-implemented process of claim 8 , wherein the video decoder comprises dedicated decoding logic of a graphics processing unit of the computing device. 13. The computer-implemented process of claim 8 , wherein the video decoder comprises a shader configured to be executable on a graphics processing unit of the computing device. 14. The computer-implemented process of claim 8 , wherein the array of textures is defined in a form of a ring buffer of textures, including one or more textures of a first size for images from video data in the first format and one or more textures of a second size for images from video data in the second format. 15. A computer readable storage medium, comprising a storage device or a memory device, and computer program instructions for a computing device, encoded on the computer readable storage medium, the computing device comprising a video decoder comprising an input configured to receive, for an encoded bitstream of video data, indices of frames of the encoded video data

Assignees

Inventors

Classifications

  • H04N19/44Primary

    Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder · CPC title

  • characterised by memory arrangements (H04N19/433 takes precedence) · CPC title

  • Embedding additional information in the video signal during the compression process (H04N19/517, H04N19/68, H04N19/70 take precedence) · CPC title

  • characterised by techniques for memory access · CPC title

  • for generating different versions · CPC title

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Frequently asked questions

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What does patent US9883194B2 cover?
In a video processing system including a video decoder, to handle frequent changes in the bit rate of an encoded bitstream, a video decoder can be configured to process a change in bit rates without reinitializing. The video decoder can be configured to reduce memory utilization. The video decoder can be configured both to process a change in bit rate without reinitializing while reducing memor…
Who is the assignee on this patent?
Microsoft Technology Licensing Llc
What technology area does this patent fall under?
Primary CPC classification H04N19/44. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).