Graphene FET with graphitic interface layer at contacts

Patent metadata

Field	Value
Publication number	US-9882008-B2
Application number	US-201514933872-A
Country	US
Kind code	B2
Filing date	Nov 5, 2015
Priority date	Nov 5, 2015
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

A method for forming a graphene FET includes providing a graphene layer having a surface. A first metal layer having a work function <4.3 eV is deposited on the graphene surface. The first metal layer is oxidized to form a first metal oxide layer. The first metal oxide layer is etched to provide open surface contact regions including a first and a second region of the graphene layer for providing a graphene surface source and drain contact. A second metal layer is deposited including a second metal layer portion providing a source with a source contact over the graphene surface source contact and a second metal layer portion providing a drain with a drain contact over the graphene surface drain contact. A grown-in graphitic interface layer is formed at an interface between the source contact and graphene surface source contact and the drain contact and graphene surface drain contact.

First claim

The invention claimed is:

1. A method for forming contacts for a graphene field-effect transistor (FET), comprising:
providing a graphene layer having a graphene surface on a substrate;
depositing a first metal layer having a work function (WF)<4.3 eV on said graphene surface;
oxidizing said first metal layer to form a first metal oxide layer;
etching said first metal oxide layer to provide open surface contact regions including a first and a second region of said graphene layer for providing a graphene surface source contact and a graphene surface drain contact, respectively;
depositing a second metal layer comprising a second metal layer portion providing a source with a source contact over said graphene surface source contact and a second metal layer portion providing a drain with a drain contact over said graphene surface drain contact, and
forming a graphitic interface layer at an interface between said source contact and said graphene surface source contact and between said drain contact and said graphene surface drain contact.

2. The method of claim 1 , wherein said forming said graphitic interface layer comprises heating said substrate in an ambient including a carbon precursor gas at a temperature >200° C.

3. The method of claim 1 , wherein said forming said second metal layer comprises saturating said second metal layer with carbon to form a carbon saturated second metal layer, and wherein said forming said graphitic interface layer comprises isothermal supersaturation of said second metal layer with C and C diffusion to said interface or cooling said carbon saturated second metal layer to precipitate said carbon from said carbon saturated second metal layer to form said graphitic interface layer.

4. The method of claim 1 , wherein said forming said graphitic interface layer comprises depositing an amorphous C layer on top of said second metal layer, then annealing in a temperature range from 200° C. to 1,000° C.

5. The method of claim 1 , wherein said first metal layer comprises Al, Ti, Hf, Zr, V, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, or Lu.

6. The method of claim 1 , wherein said second metal layer comprises Ni, Co, Cu, Ru, Rh, or Pd.

7. The method of claim 1 , wherein said forming said first metal oxide layer comprises depositing said first metal layer on said graphene surface, oxidizing said first metal layer to form said first metal oxide layer, and patterning said first metal oxide layer to provide said open surface contact regions.

8. The method of claim 1 , wherein said graphene layer is in a form carbon nanotube (CNTs).

9. The method of claim 1 , wherein said graphitic interface layer comprises two (2) to thirty (30) layers of graphene.

10. The method of claim 1 , wherein said forming said graphitic interface layer comprises carbon ion implantation of said second metal layer, then annealing in a temperature range from 200° C. to 1,000° C.

11. A method for forming contacts for a graphene field-effect transistor (FET), comprising:
forming a graphene layer having a graphene surface on a substrate;
depositing a first metal layer on the graphene surface;
oxidizing the first metal layer to form a first metal oxide layer;
etching the first metal oxide layer to expose a first and a second region of the graphene layer, the first region providing a graphene surface source contact and the second region providing a graphene surface drain contact;
depositing a second metal layer over the first metal oxide layer, graphene surface source contact and graphene surface drain contact, the second metal layer forming a metal source contact over the graphene surface source contact and a metal drain contact over the graphene surface drain contact; and
after depositing the second metal layer, growing a graphitic interface layer at an interface between the metal source contact and the graphene surface source contact and between the metal drain contact and the graphene surface drain contact by diffusion of carbon through the second metal layer.

12. The method of claim 11 , wherein the carbon is included in the second metal layer in-situ during metal deposition of the second metal layer and the graphitic interface layer is grown by annealing the second metal layer including carbon.

13. The method of claim 11 , wherein the carbon is included in the second metal layer after metal deposition of the second metal layer using a carbon ion implantation and the graphitic interface layer is grown by annealing the second metal layer including carbon.

14. The method of claim 11 , wherein carbon is included in the second metal layer after metal deposition of the second metal layer by depositing an amorphous carbon layer onto the surface of the second metal layer and the graphitic interface layer is grown by annealing the second metal layer including the amorphous carbon layer.

15. The method of claim 11 , the graphitic interface layer is grown by treating the substrate including the second metal layer with a carbon precursor at a temperature greater than 200° C.

Assignees

• Texas Instruments Inc

Inventors

• Colombo Luigi
• Venugopal Archana

Classifications

• H10P14/6314

  of a metallic layer · CPC title

• H01L21/02244

  Electricity · mapped topic

• H01L29/66742

  Electricity · mapped topic

• H01L29/517

  Electricity · mapped topic

• H01L29/1606 Primary

  Electricity · mapped topic