Memory arrays

Patent metadata

Field	Value
Publication number	US-9881971-B2
Application number	US-201414242588-A
Country	US
Kind code	B2
Filing date	Apr 1, 2014
Priority date	Apr 1, 2014
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

Some embodiments include a memory array which has a first series of access/sense lines extending along a first direction, and a second series of access/sense lines over the first series of access/sense lines and extending along a second direction which crosses the first direction. Memory cells are vertically between the first and second series of access/sense lines. Each memory cell is uniquely addressed by a combination of an access/sense line from the first series and an access/sense line from the second series. Resistance-increasing material is adjacent to and coextensive with the access/sense lines of one of the first and second series, and is between the adjacent access/sense lines and programmable material of the memory cells. Some embodiments include methods of forming memory arrays.

First claim

I claim:

1. A memory array, comprising:
a first series of lines extending along a first direction, the first series of lines comprising one of wordlines and bitlines;
a second series of lines over the first series of lines and extending along a second direction which crosses the first direction, the second series of lines comprising the other of wordlines and bitlines;
memory cells vertically between the first and second series of lines; the memory cells comprising programmable material; each memory cell being uniquely addressed by a combination of a line from the first series and a line from the second series;
a first resistance-increasing material coextensive the lines of the first series such that the resistance-increasing material covers an entirety of an upper surface of the lines of the first series, the resistance-increasing material being more resistive than the lines of said first series; the resistance-increasing material being between the lines of said first series and the programmable material and being directly against the lines of the first series;
a second resistance-increasing material linearly coextensive across the memory array with the lines of the second series; and
wherein the programmable material comprises phase change material.

2. The memory array of claim 1 wherein the first direction is substantially orthogonal to the second direction.

3. The memory array of claim 1 wherein the resistance-increasing material comprises carbon.

4. The memory array of claim 1 wherein the resistance-increasing material consists essentially of carbon.

5. The memory array of claim 1 wherein the resistance-increasing material consists of carbon.

6. The memory array of claim 1 wherein the resistance-increasing material comprises titanium and nitrogen in combination with one or both of silicon and aluminum.

7. The memory array of claim 1 wherein the resistance-increasing material is a first resistance-increasing material, and further comprising a second resistance-increasing material linearly coextensive across the memory array with the lines of the second series and disposed directly against the programmable material of the memory cells.

8. The memory array of claim 7 wherein the first and second resistance-increasing materials comprise carbon.

9. The memory array of claim 1 wherein the resistance-increasing material is a first resistance-increasing material, and further comprising a second resistance-increasing material linearly coextensive across the memory array with the lines of the second series and spaced from the programmable material of the memory cells by one or more metal-containing materials.

10. The memory array of claim 1 wherein the programmable material comprises chalcogenide.

11. The memory array of claim 1 wherein the lines of the first series are wordlines and the lines of the second series are bitlines.

12. The memory array of claim 1 further comprising select devices between the lines of the first series and the memory cells.

13. The memory array of claim 1 further comprising:
select devices over the first resistance-increasing material; and
third resistance-increasing material between the select devices and the memory cells.

14. The memory array of claim 13 wherein at least two of the first, second and third resistance-increasing materials are a same composition as one another.

15. The memory array of claim 13 wherein all of the first, second and third resistance-increasing materials are a same composition as one another.

Assignees

• Micron Technology Inc

Inventors

• Lindenberg Tony M

Classifications

• H01L45/144

  Electricity · mapped topic

• H01L27/2463 Primary

  Electricity · mapped topic

• H01L27/2481

  Electricity · mapped topic

• H01L45/06

  Electricity · mapped topic

• H01L45/1675

  Electricity · mapped topic