Encapsulating metadata of a platform for application-specific tailoring and reuse of the platform in an integrated circuit

Patent metadata

Field	Value
Publication number	US-9880966-B1
Application number	US-201514845127-A
Country	US
Kind code	B1
Filing date	Sep 3, 2015
Priority date	Sep 3, 2015
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

Application-specific tailoring and reuse of a platform for a target integrated circuit may include determining, using a processor, a plurality of unused interfaces of the platform and determining, using the processor, connectivity of a circuit block to be coupled to the platform within the target integrated circuit. The method may include coupling, using the processor, the circuit block to the platform using an interface that is compatible with the circuit block and selected from the plurality of unused interfaces of the platform.

First claim

What is claimed is:

1. A computer-implemented method of reusing a platform, comprising:
determining, using the computer, a plurality of unused interfaces of a platform for a target integrated circuit by querying metadata for the platform, wherein the platform comprises a circuit design and software configured for implementation within the target integrated circuit and the metadata specifies interfaces of the target integrated circuit used by the platform and unused interfaces of the target integrated circuit available for the platform;
determining, using the computer, connectivity of a circuit block to be added to the circuit design and the software of the platform within the target integrated circuit; and
coupling, using the computer, the circuit block to the platform using an interface that is compatible with the connectivity of the circuit block and selected from the plurality of unused interfaces of the platform.

2. The method of claim 1 , wherein determining a plurality of unused interfaces of the platform comprises:
determining an available clock port, wherein the circuit block uses the available clock port.

3. The method of claim 1 , wherein determining a plurality of unused interfaces of the platform comprises:
determining an available interrupt, wherein the circuit block uses the available interrupt.

4. The method of claim 1 , wherein determining a plurality of unused interfaces of a platform comprises:
determining an available bus, wherein the circuit block couples to the platform using the bus.

5. The method of claim 1 , wherein determining an available bus, further comprises:
determining a type of the bus.

6. The method of claim 1 , wherein coupling further comprises:
generating a data mover for the circuit block;
determining a device identifier available within an operating system of the platform; and
binding the device identifier to the data mover and the circuit block.

7. The method of claim 1 , wherein coupling further comprises:
determining an enable property of the selected interface; and
enabling the selected interface according to the enable property.

8. A system, comprising:
a processor programmed to initiate executable operations comprising:
determining a plurality of unused interfaces of a platform for a target integrated circuit by querying metadata for the platform, wherein the platform comprises a circuit design and software configured for implementation within the target integrated circuit and the metadata specifies interfaces of the target integrated circuit used by the platform and unused interfaces of the target integrated circuit available for the platform;
determining connectivity of a circuit block to be added to the circuit design and the software of the platform within the target integrated circuit; and
coupling the circuit block to the platform using an interface that is compatible with the connectivity of the circuit block and selected from the plurality of unused interfaces of the platform.

9. The system of claim 8 , wherein determining a plurality of unused interfaces of the platform comprises:
determining an available clock port, wherein the circuit block uses the available clock port.

10. The system of claim 8 , wherein determining a plurality of unused interfaces of the platform comprises:
determining an available interrupt, wherein the circuit block uses the available interrupt.

11. The system of claim 8 , wherein determining a plurality of unused interfaces of the platform comprises:
determining an available bus, wherein the circuit block couples to the platform using the bus.

12. The system of claim 11 , wherein determining an available bus, further comprises:
determining a type of the bus.

13. The system of claim 8 , wherein coupling further comprises:
generating a data mover for the circuit block;
determining a device identifier available within an operating system of the platform; and
binding the device identifier to the data mover and the circuit block.

14. The system of claim 8 , wherein coupling further comprises:
determining an enable property of the selected interface; and
enabling the selected interface according to the enable property.

15. A computer-implemented method, comprising:
determining, using the computer, available interfaces of hardware modules of the circuit design of the platform;
determining, using the processor, a plurality of software components of the circuit design for the platform;
generating, using the processor, metadata specifying the available interfaces and the plurality of software components of the platform; and
storing, using the processor, the metadata within a data structure in a computer-readable storage medium.

16. The method of claim 15 , wherein determining available interfaces of hardware modules comprises:
determining an unused interrupt of a processor block;
wherein the unused interrupt is listed in the metadata.

17. The method of claim 15 , wherein determining available interfaces of hardware modules comprises:
determining an unused clock port of a processor block;
wherein the unused clock port is listed in the metadata.

18. The method of claim 15 , wherein determining available interfaces of hardware modules comprises:
determining an unused bus for a processor block;
wherein the unused bus is listed in the metadata.

19. The method of claim 15 , wherein determining a plurality of software components of the circuit design for the platform comprises:
determining a number of devices and corresponding device identifiers registered with a kernel of the platform;
wherein the number of devices and corresponding device identifiers registered with the kernel are listed in the metadata.

20. The method of claim 15 , further comprising:
querying the data structure to determine an available interface of a hardware module of the platform; and
coupling a circuit block to the available interface of the hardware module of the platform.

Assignees

• Xilinx Inc

Inventors

• Hwang L James
• Kathail Vinod K
• Mohan Sundararajarao
• Carrillo Jorge E
• Sun Hua

Classifications

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/24

  using interrupt (G06F13/32 takes precedence) · CPC title

• G06F13/4256 Primary

  using a clocked protocol · CPC title