Power converter and method of use

Patent metadata

Field	Value
Publication number	US-9880575-B2
Application number	US-201314097487-A
Country	US
Kind code	B2
Filing date	Dec 5, 2013
Priority date	Dec 5, 2013
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

A power converter includes a power supply node, an output node, a plurality of driving units, a feedback unit, a comparator, and a control unit. Two or more of the plurality of driving units are configured to be activated or to be deactivated responsive to a plurality of control signals. The feedback unit is configured to provide a feedback voltage based on an output voltage at the output node. The comparator is configured to provide an indication signal. The control unit is configured to generate the plurality of control signals based on the indication signal. The control unit is configured to, through the plurality of control signals, increase or decrease a number of activated driving units of the plurality of driving units by one or more predetermined increments at a time.

First claim

What is claimed is:

1. A power converter, comprising:
a power supply node;
an output node;
a plurality of driving units, two or more of the plurality of driving units being configured to be activated to turn on a current path between the power supply node and the output node or to be deactivated to turn off the current path between the power supply node and the output node responsive to a plurality of control signals;
a feedback unit configured to provide a feedback voltage based on an output voltage at the output node;
a comparator, comprising:
a first input terminal configured to receive the feedback voltage;
a second input terminal configured to receive a reference voltage; and
an output terminal configured to provide an indication signal generated based on the signal at the first input terminal of the comparator and the signal at the second input terminal of the comparator; and

a control unit comprising:
a ripple detector configured to generate a digital value based on the feedback voltage and at least one detection reference voltage, and
a control logic configured to generate delay control signals according to the digital value from the ripple detector, wherein

the control unit is configured to generate the plurality of control signals based on the indication signal, the control unit being configured to, through the plurality of control signals, increase or decrease a number of activated driving units of the plurality of driving units by one or more predetermined increments at a time, the one or more predetermined increments being less than a total number of the plurality of driving units.

2. The power converter of claim 1 , wherein a driving unit of the plurality of driving units comprises one or more transistors.

3. The power converter of claim 2 , wherein each of the one or more transistors of one of the plurality of driving units comprises a source terminal coupled to the power supply node, a drain terminal coupled to the output node, and a gate terminal coupled to a corresponding one of the plurality of control signals.

4. The power converter of claim 2 , wherein the one or more transistors of one of the plurality of driving units are P-type transistors or the one or more transistors of one of the plurality of driving units are N-type transistors.

5. The power converter of claim 1 , wherein each of the plurality of driving units comprises a plurality of sub units, and the power converter further comprises a decoder configured to enable a subset of the plurality of sub units of a corresponding one of the plurality of driving units responsive to one or more adjustment signals.

6. The power converter of claim 5 , wherein the plurality of sub units of the plurality of driving units are arranged in columns and rows, and each row of sub units corresponds to one of the plurality of driving units.

7. The power converter of claim 1 , wherein the control unit comprises
a delay control unit configured to generate the plurality of control signals by imposing corresponding delays to the indication signal.

8. The power converter of claim 7 , wherein the delay control unit comprises a plurality of buffers, each of the plurality of buffers has an output configured to generate a corresponding one of the plurality of control signals.

9. The power converter of claim 1 , wherein the ripple detector comprises:
a first comparator configured to compare the feedback voltage with a first detection reference voltage; and
a second comparator configured to compare the feedback voltage with a second detection reference voltage, the second detection reference voltage having a voltage level less than that of the first detection reference voltage.

10. The power converter of claim 7 , wherein the control logic is configured to
increase the corresponding delays when the first comparator of the ripple detector indicates that a voltage level of the feedback voltage is greater than that of the first detection reference voltage;
increase the corresponding delays when the second comparator of the ripple detector indicates that the voltage level of the feedback voltage is less than that of the second detection reference voltage; and
decrease the corresponding delays when the first comparator of the ripple detector indicates that the voltage level of the feedback voltage is less than that of the first detection reference voltage and the second comparator of the ripple detector indicates that the voltage level of the feedback voltage is greater than that of the second detection reference voltage.

11. The power converter of claim 1 , wherein the control unit comprises an up-down counter configured to
generate a counter value according to the indication signal; and
output the counter value in a unary coding format as the plurality of control signals.

12. The power converter of claim 11 , wherein the up-down counter is operated according to a clock signal.

13. A method of controlling a plurality of driving units coupled between a power supply node and an output node in a power converter, the method comprising:
generating a digital value indicative of a voltage level of a feedback voltage, the feedback voltage being generated by a feedback unit based on an output voltage at the output node of the power converter;
setting one or more delays according to the digital value;
increasing the one or more delays based on a first detection reference voltage and a second detection reference voltage;
generating a plurality of control signals according to the one or more delays and an indication signal; and
controlling two or more of the plurality of driving units to turn on corresponding current paths between the power supply node and the output node or turn off the corresponding current paths between the power supply node and the output node responsive to the plurality of control signals, wherein a first driving unit of the plurality of driving units receives a first control signal of the plurality of control signals, and a second driving unit of the plurality of driving units receives a second control signal of the plurality of control signals, wherein the second control signal is generated by delaying the first control signal.

14. The method of claim 13 , wherein the generating the plurality of control signals comprises imposing corresponding delays of the one or more delays to the indication signal.

15. The method of claim 13 , wherein the setting the one or more delays comprises:
increasing the one or more delays when the voltage level of the feedback voltage is determined to be greater than a voltage level of the first detection reference voltage; and
increasing the one or more delays when the voltage level of the feedback voltage is determined to be less than a voltage level of the second detection reference voltage.

16. The method of claim 15 , wherein the setting the one or more delays further comprises:
decreasing the one or more delays when the voltage level of the feedback voltage is determined to be less than the voltage level of the first detection reference voltage and greater than the voltage level of the second detection reference voltage.

17. The method of claim 13 , further comprising resetting the one or more delays responsive to a reset instruction.

18. The method of claim 13 , wherein the one or more delays are equal to or less than 50 nanoseconds (ns).

19. A method of controlling a plurality of driving units coupled between a power supply node and an output node in a power converter, the method comprising:
generating a coun

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Tai Chia Liang

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• G05F1/59

  including plural semiconductor devices as final control devices for a single load · CPC title