Method and system for a distributed receiver

Patent metadata

Field	Value
Publication number	US-9876595-B2
Application number	US-201313760253-A
Country	US
Kind code	B2
Filing date	Feb 6, 2013
Priority date	Feb 6, 2012
Publication date	Jan 23, 2018
Grant date	Jan 23, 2018

Abstract

A first semiconductor die may comprise an interface circuit and a demodulation circuit. The interface circuit may be operable to receive an externally generated signal and recover decisions of a symbol de-mapper carried in the externally generated signal. The demodulation circuit may be operable to recover one or more transport streams based on the decisions of the symbol de-mapper. The first semiconductor die may comprise circuitry operable to combine a plurality of signals from a plurality of second semiconductor dice, where each of the plurality of signals comprises decisions of a respective one of a plurality of symbol de-mappers.

First claim

What is claimed is:

1. A system comprising:
a first semiconductor die comprising an interface receiver circuit and a demodulation circuit, wherein:
said interface receiver circuit is operable to:
receive an externally-generated signal that carries decision outputs of a symbol de-mapper that is external to said first semiconductor die, said externally-generated signal comprising a plurality of time stamps, each one of said plurality of time stamps corresponding to one of said decision outputs of said symbol de-mapper; and
process the externally-generated signal to recover said decision outputs of said symbol de-mapper carried in said externally-generated signal; and

said demodulation circuit is operable to recover one or more datastreams based on said decision outputs of said symbol de-mapper.

2. The system of claim 1 , said first semiconductor die comprising circuitry operable to combine a plurality of signals from a plurality of second semiconductor die, each of said plurality of signals comprising decision outputs of a respective one of a plurality of symbol de-mappers that are external to the first semiconductor die.

3. The system of claim 2 , wherein:
said first semiconductor die resides in a direct broadcast satellite (DBS) indoor unit; and
each of said plurality of second semiconductor dice resides in a respective one of a plurality of direct broadcast satellite (DBS) reception assemblies.

4. The system of claim 2 , wherein said first semiconductor die resides in cable television customer premise equipment.

5. The system of claim 3 , wherein:
said first semiconductor die resides in a baseband unit of a cellular basestation; and
each of said plurality of second semiconductor dice resides in a respective one of a plurality remote radio units of a satellite basestation.

6. The system of claim 1 , wherein said interface receiver circuit is operable to recover equalizer settings carried in said externally generated signal.

7. The system of claim 1 , wherein said decision outputs of said symbol de-mapper are formatted as log-likelihood ratios.

8. The system of claim 1 , wherein said decision outputs of said symbol de-mapper are hard decision outputs when a corresponding signal-to-noise ratio is below a determined threshold and are soft decision outputs when said corresponding signal-to-noise ratio is above said determined threshold.

9. A method comprising:
in a first semiconductor die comprising an interface receiver circuit and a demodulation circuit:
recovering, via said interface receiver circuit, decision outputs of a symbol de-mapper carried in an externally generated signal, wherein said symbol de-mapper is external to said first integrated circuit, said externally generated signal comprising a plurality of time stamps, each one of said plurality of time stamps corresponding to one of said decision outputs of said symbol de-mapper; and
recovering, via said demodulation circuit, one or more datastreams based on said decision outputs of said symbol de-mapper.

10. The method of claim 9 , comprising combining, via circuitry of said first semiconductor die, a plurality of signals from a plurality of second semiconductor die, each of said plurality of signals comprising decision outputs of a respective one of a plurality of symbol de-mappers that are external to the first semiconductor die.

11. The method of claim 10 , wherein:
said first semiconductor die resides in a direct broadcast satellite (DBS) indoor unit; and
each of said plurality of second semiconductor dice resides in a respective one of a plurality of direct broadcast satellite (DBS) reception assemblies.

12. The method of claim 10 , wherein said first semiconductor die resides in cable television customer premise equipment.

13. The method of claim 9 , wherein said first semiconductor die resides in a baseband unit of a cellular basestation; and
each of said plurality of second semiconductor dice resides in a respective one of a plurality remote radio units of a satellite basestation.

14. The method of claim 9 , comprising recovering, via said interface receiver circuit, equalizer settings carried in said externally generated signal.

15. The method of claim 9 , wherein said decision outputs of said symbol de-mapper are formatted as log-likelihood ratios.

16. The method of claim 9 , wherein said decision outputs of said symbol de-mapper are hard decision outputs when a corresponding signal-to-noise ratio is below a determined threshold and are soft decision outputs when said corresponding signal-to-noise ratio is above said determined threshold.

Assignees

• Ling Curtis
• Gallagher Timothy
• Chang Glenn
• Maxlinear Inc

Inventors

• Ling Curtis
• Gallagher Timothy
• Chang Glenn

Classifications

• H04N5/4401

  Electricity · mapped topic

• H04N5/455

  Demodulation-circuits · CPC title

• H04N21/42607

  for processing the incoming bitstream · CPC title

• H04H40/90 Primary

  specially adapted for satellite broadcast receiving · CPC title

• H04L27/38 Primary

  Demodulator circuits; Receiver circuits · CPC title