Method for planarizing material layer

Patent metadata

Field	Value
Publication number	US-9875909-B1
Application number	US-201615220365-A
Country	US
Kind code	B1
Filing date	Jul 26, 2016
Priority date	Jul 26, 2016
Publication date	Jan 23, 2018
Grant date	Jan 23, 2018

Abstract

A method for planarizing a silicon layer includes providing a silicon layer having at least one recess therein. Next, a photoresist layer is formed to cover the silicon layer and fill up the recess. Then, the photoresist layer is hardened. After that, part of the photoresist layer is removed by taking a top surface of the silicon layer as a stop layer. Finally the photoresist layer and the silicon layer are etched back simultaneously to remove the photoresist layer entirely.

First claim

What is claimed is:

1. A method for planarizing a silicon layer, comprising:
providing a silicon layer having at least one recess therein;
forming a photoresist layer covering the silicon layer and filling up the recess;
hardening the photoresist layer;
planarizing of the photoresist layer by taking a top surface of the silicon layer as a stop layer, wherein the step of planarizing the photoresist layer comprises planarizing the photoresist layer by a chemical mechanical planarization process; and
etching back the photoresist layer and the silicon layer to remove the photoresist layer entirely.

2. The method for planarizing a silicon layer of claim 1 , further comprising:
providing a substrate covered by the silicon layer, wherein the substrate comprises an isolated pattern and a dense pattern, and the recess is directly above the isolated pattern.

3. The method for planarizing a silicon layer of claim 2 , wherein the dense pattern comprises a plurality of fins, and the isolated pattern comprises a flat surface.

4. The method for planarizing a silicon layer of claim 1 , wherein the step of planarizing the photoresist layer comprises planarizing the photoresist layer by an etching process.

5. The method for planarizing a silicon layer of claim 1 , further comprising:
after etching back the silicon layer, patterning the silicon layer to form at least one gate.

6. The method for planarizing a silicon layer of claim 1 , wherein after forming the photoresist layer covering the silicon layer and before planarizing the photoresist layer, an entire top surface of the photoresist layer is flat.

7. The method for planarizing a silicon layer of claim 6 , wherein the photoresist layer is formed by a spin-coating process.

8. The method for planarizing a silicon layer of claim 1 , wherein after planarizing the photoresist layer by taking the top surface of the silicon layer as the stop layer, the top surface of the silicon layer is aligned with the top surface of the remaining photoresist layer.

9. A method for planarizing a material layer, comprising:
providing a material layer having at least one recess therein;
forming a photoresist layer covering the material layer and filling up the recess;
hardening the photoresist layer;
after hardening the photoresist layer, removing part of the photoresist layer by taking a top surface of the material layer as a stop layer, wherein the step of removing part of the photoresist layer comprises removing part of the photoresist layer by a chemical mechanical planarization process; and
etching back the photoresist layer and the material layer to remove the photoresist layer entirely.

10. The method for planarizing a material layer of claim 9 , wherein the material layer comprises a semiconductor layer, a metal layer, or a dielectric layer.

11. The method for planarizing a material layer of claim 9 , wherein the material layer is copper, tungsten or titanium.

12. The method for planarizing a material layer of claim 9 , wherein the material layer is silicon nitride, silicon oxide or silicon oxynitride.

13. The method for planarizing a material layer of claim 9 , further comprising a substrate covered by the material layer, wherein the substrate comprises an isolated pattern and a dense pattern, and the recess is directly above the isolated pattern.

14. The method for planarizing a material layer of claim 13 , wherein the dense pattern comprises a plurality of fins, and the isolated pattern comprises a flat surface.

15. The method for planarizing a material layer of claim 9 , wherein the step of removing part of the photoresist layer comprises removing part of the photoresist layer by an etching process.

16. The method for planarizing a material layer of claim 9 , wherein after forming the photoresist layer covering the material layer and before removing part of the photoresist layer, an entire top surface of the photoresist layer is flat.

17. The method for planarizing a material layer of claim 16 , wherein the photoresist layer is formed by a spin-coating process.

18. The method for planarizing a material layer of claim 9 , wherein after removing part of the photoresist layer by taking the top surface of the material layer as the stop layer, the top surface of the material layer is aligned with the top surface of the remaining photoresist layer.

Assignees

• United Microelectronics Corp

Inventors

• Tsai Fu-Shou
• Li Yu-Ting
• Hsu Li-Chieh
• Liu Yi-Liang
• Li Kun-Ju
• Huang Po-Cheng
• Lin Chien-Nan

Classifications

• H10P95/062 Primary

  involving a dielectric removal step · CPC title

• H10P95/08

  Planarisation of organic insulating materials · CPC title

• H10P95/04

  Planarisation of conductive or resistive materials · CPC title

• H10P52/403

  of conductive or resistive materials · CPC title

• H10P52/402

  of semiconductor materials · CPC title