Hybrid digital/analog noise shaping in the sigma-delta conversion

US9871533B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9871533-B2
Application numberUS-201715421989-A
CountryUS
Kind codeB2
Filing dateFeb 1, 2017
Priority dateFeb 1, 2016
Publication dateJan 16, 2018
Grant dateJan 16, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.

First claim

Opening claim text (preview).

What is claimed is: 1. An analog/digital converter comprising: an analog stage comprising at least one first sigma-delta modulator; and a digital stage comprising at least one second sigma-delta modulator, wherein the at least one first sigma-delta modulator is configured to convert an analog input signal into a first digital output signal, wherein the analog stage is configured to output a digital signal to the digital stage, wherein the digital signal is indicative of a noise contribution of the at least one first sigma-delta modulator, wherein the at least one second sigma-delta modulator is configured to convert the digital signal into a second digital output signal, wherein the analog/digital converter is configured to determine a digital result signal which is indicative of the analog input signal on the basis of the first digital output signal and the second digital output signal, and wherein the analog stage and the digital stage are arranged in a multi-stage noise shaping architecture. 2. An analog/digital converter comprising: an analog stage comprising at least one first sigma-delta modulator; and a digital stage comprising at least one second sigma-delta modulator, wherein the analog stage is configured to output a digital signal to the digital stage, wherein the digital signal is indicative of a noise contribution of the at least one first sigma-delta-modulator, and wherein the analog stage and the digital stage are arranged in a multi-stage noise shaping architecture. 3. The analog/digital converter as claimed in claim 2 , wherein each of the at least one first sigma-delta modulators the analog stage is of the L-th order, and wherein L is at least equal to one or two. 4. The analog/digital converter as claimed in claim 3 , wherein the digital stage comprises a number of K second sigma-delta modulators in a multi-stage noise shaping architecture, and wherein K is at least equal to one or two. 5. The analog/digital converter as claimed in claim 4 , wherein the analog/digital converter ( 100 ) has a noise transfer function of the order L+K. 6. The analog/digital converter ( 100 ) as claimed in claim 2 , wherein the at least one first sigma-delta modulator comprises at least one 1-bit feedback path. 7. The analog/digital converter as claimed in claim 2 , wherein the analog stage comprises an n-bit comparison circuit, wherein n is greater than or equal to two, and wherein the digital signal has an n-bit word length. 8. The analog/digital converter as claimed in claim 7 , wherein the comparison circuit comprises an analog/digital converter. 9. The analog/digital converter as claimed in claim 7 , wherein n is greater than three. 10. The analog/digital converter as claimed claim 7 , wherein the at least one second sigma-delta modulator comprises at least one n-bit feedback path. 11. The analog/digital converter as claimed in claim 2 , wherein each of the at least one first sigma-delta modulators comprises at least one analog amplification structure and one comparison circuit, wherein each of the at least one second sigma-delta modulators comprises at least one digital amplification structure. 12. The analog/digital converter as claimed in claim 2 , wherein the digital stage is configured to at least partially compensate for a noise contribution of the at least one first sigma-delta modulator. 13. The analog/digital converter as claimed in claim 2 , further comprising a digital correction circuit configured to adapt a second digital output signal of the at least one second sigma-delta modulator to a first digital output signal of the at least one first sigma-delta modulator. 14. A method comprising: using a digital signal, coupling an analog stage with at least one first sigma-delta modulator and one digital stage with at least one second sigma-delta modulator, wherein the analog stage and the digital stage are arranged in a multi-stage noise shaping architecture. 15. The method as claimed in claim 14 , further comprising: using the at least one first sigma-delta modulator, converting an analog input signal into a first digital output signal; outputting a digital signal to the digital stage, wherein the digital signal is indicative of a noise contribution of the at least one first sigma-delta modulator; converting the digital signal into a second digital output signal; and determining a digital result signal based on the first digital output signal and the second digital output signal, wherein the digital result signal is indicative of the analog input signal.

Assignees

Inventors

Classifications

  • H03M3/352Primary

    of deviations from the desired transfer characteristic · CPC title

  • Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

  • of non-linear distortion, e.g. instability (avoiding instability by structural design H03M3/44) · CPC title

  • H03M3/414Primary

    having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type · CPC title

  • Digital delta-sigma modulation · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9871533B2 cover?
An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage …
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H03M3/352. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).