Generating an overdrive voltage for power switch circuitry

Patent metadata

Field	Value
Publication number	US-9871507-B1
Application number	US-201615264365-A
Country	US
Kind code	B1
Filing date	Sep 13, 2016
Priority date	Sep 13, 2016
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

Techniques are disclosed relating to generating an overdrive voltage for power switch circuitry. In some embodiments, the value of the overdrive voltage is adjusted dynamically in order to reduce leakage current during power gating. In some embodiments, an apparatus includes a power switch circuit element configured to gate power to circuitry in the apparatus based on a control signal. In some embodiments, the power switch circuit element is powered by a supply voltage. In some embodiments, the apparatus also includes control circuitry configured to generate the control voltage at a different voltage level than the supply voltage, based on comparison of leakage current of ones of a plurality of replicas of the power switch circuit element. In some embodiments, the replicas are configured to receive different reference voltages as respective replica control signals. In various embodiments, the disclosed techniques may generate overdrive voltages that reduce leakage current during power gating.

First claim

What is claimed is:

1. An apparatus, comprising:
a power switch circuit element configured to gate power to circuitry in the apparatus based on a control signal, wherein the power switch circuit element is powered by a supply voltage; and
control circuitry configured to generate the control signal at a different voltage level than the supply voltage, wherein the control circuitry is configured to generate the voltage level of the control signal based on comparison of leakage currents of ones of a plurality of replicas of the power switch circuit element, wherein ones of the plurality of replicas include a control terminal and wherein the apparatus is configured to provide a first reference voltage to the control terminal of a first replica of the plurality of replicas and a second, different reference voltage to the control terminal of a second replica of the plurality of replicas.

2. The apparatus of claim 1 , wherein the control circuitry includes digital logic circuitry configured to select one of the reference voltages based on the comparison.

3. The apparatus of claim 2 , wherein the control circuitry includes a multiplexer configured to receive ones of the reference voltages, wherein the multiplexer is controlled by the digital logic circuitry.

4. The apparatus of claim 2 , wherein the digital logic circuitry implements one or more digital low-pass filters.

5. The apparatus of claim 1 , wherein the control circuitry is configured to select a reference voltage to the generate the voltage level of the control signal, wherein the control circuitry is configured to select the reference voltage corresponding to the one of the plurality of replicas with the lowest leakage current.

6. The apparatus of claim 1 , wherein the control circuitry includes voltage comparison circuitry configured to compare voltage levels at terminals of respective ones of the replicas.

7. The apparatus of claim 1 , wherein the control circuitry includes current comparison circuitry configured to generate comparison output signals based on direct comparison of leakage currents of ones of the replicas.

8. The apparatus of claim 1 , further comprising a power supply configured to generate the control signal based on one of the different reference voltages.

9. The apparatus of claim 1 , wherein the control circuitry includes voltage ladder circuitry configured to generate the reference voltages.

10. The apparatus of claim 1 , wherein the apparatus is configured to use the voltage level for multiple power switch circuits in an integrated circuit region that includes the replicas.

11. The apparatus of claim 1 , wherein the apparatus is configured to power gate circuitry coupled to the power switch circuit element by initially controlling the power switch circuit element into a gated mode using the supply voltage and subsequently controlling the power switch circuit element in the gated mode using the voltage level of the control signal.

12. A non-transitory computer readable storage medium having stored thereon design information that specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the circuit according to the design, including:
a power switch circuit element configured to gate power to a portion of the circuit based on a control signal, wherein the power switch circuit element is powered by a supply voltage; and
control circuitry configured to generate the control signal at a different voltage level than the supply voltage, wherein the voltage level of the control signal is based on comparison of leakage currents of ones of a plurality of replicas of the power switch circuit element, ones of the plurality of replicas include a control terminal and wherein the circuit is configured to provide a first reference voltage to the control terminal of a first replica of the plurality of replicas and a second, different reference voltage to the control terminal of a second replica of the plurality of replicas.

13. The non-transitory computer readable storage medium of claim 12 , wherein the design information specifies that the control circuitry includes digital logic circuitry configured to select one of the reference voltages based on the comparison.

14. The non-transitory computer readable storage medium of claim 13 , wherein the digital logic circuitry implements one or more filters on outputs of the comparison.

15. The non-transitory computer readable storage medium of claim 12 , wherein the design information specifies that the control circuitry includes voltage ladder circuitry configured to generate the reference voltages.

16. The non-transitory computer readable storage medium of claim 12 , wherein the design information specifies that the circuit is configured to use the voltage level for multiple power switch circuits in region of the circuit.

17. The non-transitory computer readable storage medium of claim 12 , wherein the circuit is configured to power gate the portion of the circuit by initially controlling the power switch circuit element off using the supply voltage and subsequently controlling the power switch circuit element off using the voltage level of the control signal.

18. A method, comprising:
selecting a control voltage for one or more power switch circuits that are powered by a supply voltage, wherein the control voltage is different than the supply voltage, based on:
controlling a plurality of replicas of the one or more power switch circuits, wherein ones of the replicas include a control terminal and wherein the controlling includes providing different reference voltages to the respective control terminal of different ones of the replicas; and
comparing leakage currents of ones of the replicas.

19. The method of claim 18 , further comprising selecting one of the different reference voltages as the control voltage based on the comparing.

20. The method of claim 18 , wherein the comparing is performed by comparing voltages at drain terminals of ones of the replicas.

Assignees

• Apple Inc

Inventors

• Zyuban Victor
• Suzuki Shingo

Classifications

• H03K17/161 Primary

  in field-effect transistor switches · CPC title

• H03K5/24

  the characteristic being amplitude · CPC title

• H03K17/166 Primary

  Soft switching · CPC title

• H03K19/0016

  by using a control or a clock signal, e.g. in order to apply power supply · CPC title