3D-joining of microelectronic components with conductively self-adjusting anisotropic matrix

US9871014B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9871014-B2
Application numberUS-201615257427-A
CountryUS
Kind codeB2
Filing dateSep 6, 2016
Priority dateSep 8, 2015
Publication dateJan 16, 2018
Grant dateJan 16, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

3D joining of microelectronic components and a conductively self-adjusting anisotropic matrix are provided. In an implementation, an adhesive matrix automatically makes electrical connections between two surfaces that have electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of joining microelectronic components, comprising: forming an adhesive matrix between two surfaces to be joined, the adhesive matrix comprising conductive members aligned vertically in an adhesive medium, wherein forming the adhesive matrix includes providing conductive members aligned vertically with a pitch averaging approximately 1 micrometer (μm) or less from each other, the adhesive medium electrically insulating the vertically aligned conductive members from horizontal electrical conduction between each other; pressing the two surfaces together to conductively connect respective electrical contacts on the two surfaces via the conductive members in the adhesive matrix, the respective electrical contacts at least partially aligned with each other along a vertical line; and securing the two surfaces together with the adhesive medium within the adhesive matrix. 2. The method of claim 1 , wherein pressing the two surfaces together comprises conductively connecting misaligned electrical contacts of the two surfaces via the conductive members of the adhesive matrix. 3. The method of claim 1 , wherein pressing the two surfaces together comprises nonconductively adhering corresponding parts of the two surfaces together where no electrical contacts are located, via the adhesive medium within the adhesive matrix. 4. The method of claim 1 , wherein the conductive members are selected from the group consisting of carbon nanotubes, densely packed conductive wires, coated carbon nanotubes, a conductive aligned film of single-walled carbon nanotubes (SWNT), carbon nanotubes with a surfactant outer layer, carbon nanotubes with a dispersant outer layer, carbon nanotubes with a hydrophobic outer layer, carbon nanotubes with a hydrophilic outer layer, copper wires, silver wires, aluminum wires, nickel wires, gold wires, and alloy wires. 5. The method of claim 1 , wherein forming the adhesive matrix between two surfaces to be joined further comprises forming aligned carbon nanotubes or conducting wires on a first surface of the two surfaces, applying the adhesive medium to a second surface of the two surfaces, and forming the adhesive matrix by contacting the first surface and the second surface together. 6. The method of claim 5 , wherein forming the adhesive matrix between two surfaces to be joined comprises forming the aligned carbon nanotubes or the conducting wires only on the electrical contacts of the first surface of the two surfaces, applying the adhesive medium to a second surface of the two surfaces, and forming the adhesive matrix by joining the first surface and the second surface together. 7. The method of claim 1 , wherein forming the adhesive matrix between two surfaces to be joined further comprises forming the conductive members only on the electrical contacts of the first surface of the two surfaces, and applying the adhesive medium to an entire area of the same first surface. 8. A method of joining microelectronic components, comprising: forming an adhesive matrix between two surfaces to be joined, the adhesive matrix comprising conductive members aligned vertically in an adhesive medium, wherein forming the adhesive matrix between two surfaces to be joined further comprises: forming aligned carbon nanotubes or aligned coated wires on a surface of a standalone substrate; applying the adhesive medium into the aligned carbon nanotubes or the aligned coated wires at the surface of the standalone substrate to make a layer of the adhesive medium of the adhesive matrix; removing the standalone substrate from the adhesive matrix to reveal a standalone adhesive matrix with the aligned carbon nanotubes or aligned coated wires flush with one surface of the layer of the adhesive medium; and placing the adhesive matrix between the two surfaces to be joined; pressing the two surfaces together to conductively connect respective electrical contacts on the two surfaces via the conductive members in the adhesive matrix, the respective electrical contacts at least partially aligned with each other along a vertical line; and securing the two surfaces together with the adhesive medium within the adhesive matrix. 9. The method of claim 8 , further comprising adding a fill layer or a release layer on the standalone substrate where the aligned carbon nanotubes or the aligned coated wires attach to the surface of the standalone substrate; applying the adhesive medium into the aligned carbon nanotubes or the aligned coated wires at a top surface of the fill layer or the release layer; releasing the fill layer or the release layer and removing the standalone substrate to reveal a standalone adhesive matrix with both ends of the aligned carbon nanotubes or aligned coated wires free of the adhesive medium and prepared for penetrating into a solder or for connecting with the electrical contacts; and placing the adhesive matrix between the two surfaces to be joined. 10. A method of joining microelectronic components, comprising: forming an adhesive matrix between two surfaces to be joined, the adhesive matrix comprising conductive members aligned vertically in an adhesive medium; coating the electrical contacts of at least one surface of the two surfaces with a solder or a flowable joining material; pressing the two surfaces together to conductively connect respective electrical contacts on the two surfaces via the conductive members in the adhesive matrix, the respective electrical contacts at least partially aligned with each other along a vertical line; and securing the two surfaces together with the adhesive medium within the adhesive matrix, wherein the conductive members in the adhesive matrix bend, kink, or break upon engaging a hard surface of an area that is not a conductive contact to nonconductively bond the two surfaces together where there is no overlap of the vertically corresponding electrical contacts of the two surfaces. 11. The method of claim 10 , further comprising: coating the electrical contacts on only a first surface of the two surfaces with a solder having a melting temperature; assembling the adhesive matrix on a second surface of the two surfaces; and either selecting the adhesive medium to comprise a solid thermoplastic material having a melting temperature or a glass transition temperature higher than the melting temperature of the solder, or, selecting the adhesive medium to comprise a thermoset material having a curing temperature or a setting temperature lower than the melting temperature of the solder, or, selecting the adhesive medium to comprise a thermoset material having a curing temperature or a setting temperature higher than the melting temperature of the solder, and the thermoset material is cured prior to the joining the two surfaces. 12. The method of claim 10 , further comprising applying a heat or a pressure to cause the solder or the flowable joining material coating the electrical contacts to flow before the adhesive matrix flows. 13. The method of claim 10 , further comprising heating the microelectronic component under a vacuum to soften at least the solder that is coating the electrical contacts while the conductive members are pressed into the solder; and repressurizing the vacuum to flow the adhesive matrix for joining the two surfaces while the conductive members connect the vertically corresponding electrical contacts of the two surfaces. 14. A microelectronic package, comprising: an interface between two components of the microelectronic package; an adhesive matrix of the interface to secure the two components together; conductive members in the adhe

Assignees

Inventors

Classifications

  • H10W99/00Primary

    Subject matter not provided for in other groups of this subclass · CPC title

  • between stacked chips · CPC title

  • between stacked chips · CPC title

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

  • changes in dispositions · CPC title

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What does patent US9871014B2 cover?
3D joining of microelectronic components and a conductively self-adjusting anisotropic matrix are provided. In an implementation, an adhesive matrix automatically makes electrical connections between two surfaces that have electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at l…
Who is the assignee on this patent?
Invensas Corp
What technology area does this patent fall under?
Primary CPC classification H10W99/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).