Contact process and contact structure for semiconductor device

Patent metadata

Field	Value
Publication number	US-9870943-B2
Application number	US-201514598645-A
Country	US
Kind code	B2
Filing date	Jan 16, 2015
Priority date	Jan 16, 2015
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

A contact process for a semiconductor device is described. A substrate having a doped region and a dielectric layer over the doped region is provided. A contact hole is formed through the dielectric layer and exposing the doped region. An insulating liner layer is formed a in the contact hole. A portion of the insulating liner layer at a bottom of the contact hole is etch-removed and over-etching is performed. A conductive epitaxial layer is formed from the doped region in the contact hole, and then the contact hole is filled with a conductive material.

First claim

What is claimed is:

1. A contact structure for a semiconductor device, comprising:
a conductive epitaxial layer in a contact hole for a doped region in a substrate, wherein the conductive epitaxial layer completely covers a bottom surface of the contact hole and is embedded in a metal silicide layer on the doped region; and
a conductive material on the conductive epitaxial layer, surrounded by an insulating liner layer on a sidewall of the contact hole and filling the contact hole,
wherein entirety of the conductive epitaxial layer is substantially located below the conductive material.

2. The contact structure of claim 1 , wherein the conductive epitaxial layer comprises Si 1-x-y C x P y , GaN, n-type polysilicon or p-type polysilicon, wherein x ranges from 0.01 to 0.05 and y ranges from 0.01 to 0.05.

3. The contact structure of claim 1 , wherein the conductive epitaxial layer goes through the metal silicide layer on the doped region.

4. The contact structure of claim 3 , wherein a bottom portion of the conductive epitaxial layer is embedded in the doped region.

5. The contact structure of claim 3 , wherein the epitaxial layer comprises Si 1-x-y C x P y , x ranges from 0.01 to 0.05, and y ranges from 0.01 to 0.05.

6. The contact structure of claim 5 , wherein in the epitaxial layer, a concentration of phosphorus is within a range of 2.0×10 20 cm −3 to 2.5×10 20 cm −3 and a concentration of carbon is within a range of 9.0×10 20 cm −3 to 9.5×10 20 cm −3 .

7. The contact structure of claim 3 , wherein the metal silicide layer comprises CoSi 2 , NiSi, NiPtSi, TiSi 2 , or WSi.

8. The contact structure of claim 1 , wherein the insulating liner layer comprises silicon nitride (SiN) or SiON.

9. The contact structure of claim 1 , wherein the conductive material comprises tungsten, Al, AlSi, WSi or copper.

10. The contact structure of claim 1 , wherein the doped region is a source/drain region of a MOS structure.

Assignees

• Macronix Int Co Ltd

Inventors

• Ko Zong-Jie
• Li Hsiao-Leng

Classifications

• H10P14/40

  of conductive or resistive materials · CPC title

• H10D64/0113

  the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers · CPC title

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/069

  by forming self-aligned vias or self-aligned contact plugs · CPC title